Publications
Summary: IEEE TCAD (62), DAC (36), ICCAD (41), etc.
Journal & Conference Papers
Accepted
2024
[C208]
Fangzhou Liu, Zehua Pei, Ziyang Yu, Haisheng Zheng, Zhuolun He, Tinghuan Chen, Bei Yu,
“CBTune: Contextual Bandit Tuning for Logic Synthesis”,
IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Valencia, Spain, Mar. 25–27, 2024.
[C207]
Hongduo Liu, Peiyu Liao, Junhua Huang, Hui-Ling Zhen, Mingxuan Yuan, Tsung-Yi Ho, Bei Yu,
“Parallel Grobner Basis Rewriting and Memory Optimization for Efficient Multiplier Verification”,
IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Valencia, Spain, Mar. 25–27, 2024.
[C206]
Zhuolun He, Bei Yu,
“Large Language Models for EDA: Future or Mirage?”,
ACM International Symposium on Physical Design (ISPD), Taipei, Mar. 12–15, 2024.
(Invited Paper)
(paper)
[C205]
Yuan Pu, Tinghuan Chen, Zhuolun He, Chen Bai, Haisheng Zheng, Yibo Lin, Bei Yu,
“IncreMacro: Incremental Macro Placement Refinement”,
ACM International Symposium on Physical Design (ISPD), Taipei, Mar. 12–15, 2024.
(Best Paper Award Nomination)
(paper)
[C204]
Yu Zhang, Yuan Pu, Fangzhou Liu, Peiyu Liao, Kaiyuan Chao, Keren Zhu, Yibo Lin, Bei Yu,
“Multi-Electrostatics Based Placement for Non-Integer Multiple-Height Cells”,
ACM International Symposium on Physical Design (ISPD), Taipei, Mar. 12–15, 2024.
(paper)
[C203]
Shuo Yin, Wenqian Zhao, Li Xie, Hong Chen, Yuzhe Ma, Tsung-Yi Ho, Bei Yu,
“FuILT: Full Chip ILT System With Boundary Healing”,
ACM International Symposium on Physical Design (ISPD), Taipei, Mar. 12–15, 2024.
(paper)
[C202]
Siting Liu, Jiaxi Jiang, Zhuolun He, Ziyi Wang, Yibo Lin, Bei Yu, Martin Wong,
“Routing-aware Legal Hybrid Bonding Terminal Assignment for 3D Face-to-Face Stacked ICs”,
ACM International Symposium on Physical Design (ISPD), Taipei, Mar. 12–15, 2024.
(paper)
[C201]
Guojin Chen, Hao Geng, Bei Yu, David Z. Pan,
“Open-Source Differentiable Lithography Imaging Framework”,
SPIE Advanced Lithography + Patterning, San Jose, Feb. 25–29, 2024.
[C200]
Chen Bai, Jianwang Zhai, Yuzhe Ma, Bei Yu, Martin D.F. Wong,
“Towards Automated RISC-V Microarchitecture Design with Reinforcement Learning”,
AAAI Conference on Artificial Intelligence (AAAI), Vancouver, Feb. 20–27, 2024.
(paper)
[C199]
Xufeng Yao, Fanbin Lu, Yuechen Zhang, Xinyun Zhang, Wenqian Zhao, Bei Yu,
“Progressively Knowledge Distillation via Re-parameterizing Diffusion Reverse Process”,
AAAI Conference on Artificial Intelligence (AAAI), Vancouver, Feb. 20–27, 2024.
(paper)
[C198]
Haoyuan Wu, Xinyun Zhang, Peng Xu, Peiyu Liao, Xufeng Yao, Bei Yu,
“p-Laplacian Adaptation for Generative Pre-trained Vision-Language Models”,
AAAI Conference on Artificial Intelligence (AAAI), Vancouver, Feb. 20–27, 2024.
(paper)
(Oral)
[C197] Yu Zhang, Wei Lin, Sisi Chen, Qingyu Song, Jiaxun Lu, Yunfeng Shao, Bei Yu, Hong Xu,
“Fed2Com: Towards Efficient Compression in Federated Learning”,
IEEE International Conference on Computing, Networking and Communications (ICNC), Hawaii, Feb. 19–22, 2024.
[C196] Xingquan Li, Zengrong Huang, Simin Tao, Zhipeng Huang, Chunan Zhuang, Hao Wang, Yifan Li, Yihang Qiu, Guojie Luo, Huawei Li,
Haihua Shen, Mingyu Chen, Dongbo Bu, Wenxing Zhu, Ye Cai, Xiaoming Xiong, Ying Jiang, Yi Heng, Peng Zhang, Bei Yu, Biwei Xie, Yungang Bao,
“iEDA: An Open-source infrastructure of EDA”,
IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), South Korea, Jan. 22–25, 2024.
(paper)
(Invited Paper)
[C195] Xingquan Li, Simin Tao, Shijian Chen, Zhisheng Zeng, Zhipeng Huang, Hongxi Wu, Weiguo Li1, Zengrong Huang, Liwei Ni, Xueyan Zhao,
He Liu, Shuaiying Long, Ruizhi Liu, Xiaoze Lin, Bo Yang, Fuxing Huang, Zonglin Yang, Yihang Qiu, Zheqing Shao, Jikang Liu,
Yuyao Liang, Biwei Xie, Yungang Bao, Bei Yu,
“iPD: An Open-source intelligent Physical Design Tool Chain”,
IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), South Korea, Jan. 22–25, 2024.
(paper)
(Invited Paper)
[C194] Peng Xu, Jintao Li, Tsung-Yi Ho, Bei Yu, Keren Zhu,
“Performance-Driven Analog Layout Automation: Current Status and Future Directions”,
IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), South Korea, Jan. 22–25, 2024.
(paper)
(Invited Paper)
[C193] Shixin Chen, Su Zheng, Chen Bai, Wenqian Zhao, Shuo Yin, Yang Bai, Bei Yu,
“SoC-Tuner: An Importance-guided Exploration Framework for DNN-targeting SoC Design”,
IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), South Korea, Jan. 22–25, 2024.
(paper)
[C192] Haisheng Zheng, Zhuolun He, Fangzhou Liu, Zehua Pei, Bei Yu,
“LSTP: A Logic Synthesis Timing Predictor”,
IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), South Korea, Jan. 22–25, 2024.
(paper)
[C191] Ping Zhang, Pengju Yao, Xingquan Li, Bei Yu, Wenxing Zhu,
“V-GR: 3D Global Routing with Via Minimization and Multi-Strategy Rip-up and Rerouting”,
IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), South Korea, Jan. 22–25, 2024.
(paper)
[J101]
Zhaoting Chen, Junzhe Cai, Changhao Yan, Zhaori Bi, Yuzhe Ma, Bei Yu, Dian Zhou, Xuan Zeng,
“pNeurFill: Enhanced Neural Network Model-Based Dummy Filling Synthesis with Perimeter Adjustment”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 43, no. 02, pp. 667–680, 2024.
(paper)
[J100]
Yang Bai, Xufeng Yao, Qi Sun, Wenqian Zhao, Shixin Chen, Zixiao Wang, Bei Yu,
“GTCO: Graph and Tensor Co-Design for Transformer-based Image Recognition on Tensor Cores”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 43, no. 02, pp. 586–599, 2024.
(paper)
[J99]
Yuyang Ye, Tinghuan Chen, Zicheng Wang, Hao Yan, Bei Yu, Longxing Shi,
“Fast and Accurate Aging-aware Cell Timing Model via Graph Learning”,
IEEE Transactions on Circuits and Systems II (TCASII), vol. 71, no. 01, pp. 156–160, 2024.
(paper)
[J98]
Chen Bai, Qi Sun, Jianwang Zhai, Yuzhe Ma, Bei Yu, Martin D.F. Wong,
“BOOM-Explorer: RISC-V BOOM Microarchitecture Design Space Exploration”,
ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 29, no. 01, pp. 1–23, 2024.
(paper)
[J97]
Xiaoxiao Liang, Yikang Ouyang, Haoyu Yang, Bei Yu, Yuzhe Ma,
“RL-OPC: Mask Optimization with Deep Reinforcement Learning”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 43, no. 01, pp. 340–351, 2024.
(paper)
2023
[C187] Chen Bai, Xuechao Wei, Youwei Zhuo, Yi Cai, Hongzhong Zheng, Bei Yu, Yuan Xie,
“Klotski: DNN Model Orchestration Framework for Dataflow Architecture Accelerators”,
IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Francisco, Oct. 29–Nov. 02, 2023.
(paper)
(slides)
(poster)
(video)
[C186] Ziyang Yu, Chen BAI, Shoubo Hu, Ran Chen, Taohai He, Mingxuan Yuan, Bei Yu, Martin Wong,
“IT-DSE: Invariant Risk Minimized Transfer Microarchitecture Design Space Exploration”,
IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Francisco, Oct. 29–Nov. 02, 2023.
(paper)
(slides)
(poster)
(video)
[C185] Su Zheng, Lancheng Zou, Peng XU, Siting Liu, Bei Yu, Martin Wong,
“Lay-Net: Grafting Netlist Knowledge on Layout-Based Congestion Prediction”,
IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Francisco, Oct. 29–Nov. 02, 2023.
(paper)
(slides)
(poster)
(video)
[C184] Zehua Pei, Fangzhou Liu, Zhuolun He, Guojin Chen, Haisheng Zheng, Keren Zhu, Bei Yu,
“AlphaSyn: Logic Synthesis Optimization with Efficient Monte Carlo Tree Search”,
IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Francisco, Oct. 29–Nov. 02, 2023.
(paper)
(slides)
(poster)
[C183] Rongliang Fu, Olivia Chen, Junying Huang, Bei Yu, Nobuyuki Yoshikawa, Tsung-Yi Ho,
“DLPlace: A Delay-Line Clocking-based Placement Framework for AQFP Circuits”,
IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Francisco, Oct. 29–Nov. 02, 2023.
(paper)
[C180] Chen Bai, Jiayi Huang, Xuechao Wei, Yuzhe Ma, Sicheng Li, Hongzhong Zheng, Bei Yu, Yuan Xie,
“ArchExplorer: Microarchitecture Exploration Via Bottleneck Analysis”,
IEEE/ACM International Symposium on Microarchitecture (MICRO), Toronto, Oct. 28–Nov. 01, 2023.
(paper)
(slides)
[C179] Su Zheng, Bei Yu, Martin Wong,
“OpenILT: An Open Source Inverse Lithography Technique Framework”,
IEEE International Conference on ASIC (ASICON), Nanjing, Oct. 24–27, 2023.
(paper)
(slides)
(Invited Paper)
[C177] Zhuolun He, Haoyuan Wu, Xinyun Zhang, Xufeng Yao, Su Zheng, Haisheng Zheng and Bei Yu,
“ChatEDA: A Large Language Model Powered Autonomous Agent for EDA”,
ACM/IEEE Workshop on Machine Learning for CAD (MLCAD), Utah, Sep. 11-13, 2023.
(paper)
(arXiv)
[C175] Siting Liu, Yuan Pu, Peiyu Liao, Hongzhong Wu, Rui Zhang, Zhitang Chen, Wenlong Lv, Yibo Lin, Bei Yu,
“FastGR: Global Routing on CPU-GPU with Heterogeneous Task Graph Scheduler (Extended Abstract)”,
International Joint Conference on Artificial Intelligence (IJCAI), Macau, Aug. 19–25, 2023.
(paper)
(slides)
[C173] Peng Xu, Lin Zhang, Xuanzhou Liu, Jiaqi Sun, Yue Zhao, Haiqin Yang, Bei Yu,
“Do Not Train It: A Linear Neural Architecture Search of Graph Neural Networks”,
International Conference on Machine Learning (ICML), Hawaii, Jul. 23–29, 2023.
(paper)
(slides)
(poster)
[C172] Zhuolun He, Yihang Zuo, Jiaxi Jiang, Haisheng Zheng, Yuzhe Ma, Bei Yu,
“OpenDRC: An Efficient Open-Source Design Rule Checking Engine with Hierarchical GPU Acceleration”,
ACM/IEEE Design Automation Conference (DAC), San Francisco, Jul. 09–13, 2023.
(paper)
(slides)
[C170] Siting Liu, Ziyi Wang, Fangzhou Liu, Yibo Lin, Bei Yu, Martin Wong,
“Concurrent Sign-off Timing Optimization via Deep Steiner Points Refinement”,
ACM/IEEE Design Automation Conference (DAC), San Francisco, Jul. 09–13, 2023.
(paper)
(slides)
(poster)
[C169] Hongduo Liu, Peiyu Liao, Mengchuan Zou, Bowen Pang, Xijun Li, Mingxuan Yuan, Tsung-Yi Ho, Bei Yu,
“Layout Decomposition via Boolean Satisfiability”,
ACM/IEEE Design Automation Conference (DAC), San Francisco, Jul. 09–13, 2023.
(paper)
(slides)
(poster)
[C168] Guojin Chen, Zehua Pei, Haoyu Yang, Yuzhe Ma, Bei Yu, Martin Wong,
“Physics-Informed Optical Kernel Regression Using Complex-valued Neural Fields”,
ACM/IEEE Design Automation Conference (DAC), San Francisco, Jul. 09–13, 2023.
(paper)
(slides)
(poster)
[C167] Ziyi Wang, Siting Liu, Yuan Pu, Song Chen, Tsung-Yi Ho, Bei Yu,
“Realistic Sign-off Timing Prediction via Multimodal Fusion”,
ACM/IEEE Design Automation Conference (DAC), San Francisco, Jul. 09–13, 2023.
(paper)
(slides)
(poster)
[C166] Zixiao Wang, Yunheng Shen, Wenqian Zhao, Yang Bai, Guojin Chen, Farzan Farnia, Bei Yu,
“DiffPattern: Layout Pattern Generation via Discrete Diffusion”,
ACM/IEEE Design Automation Conference (DAC), San Francisco, Jul. 09–13, 2023.
(paper)
(slides)
(poster)
[C165] Su Zheng, Lancheng Zou, Siting Liu, Yibo Lin, Bei Yu, Martin Wong,
“Mitigating Distribution Shift for Congestion Optimization in Global Placement”,
ACM/IEEE Design Automation Conference (DAC), San Francisco, Jul. 09–13, 2023.
(paper)
(slides)
(poster)
[C164] Yu Zhang, Yifan Chen, Zhonglin Xie, Hong Xu, Zaiwen Wen, Yibo Lin, Bei Yu,
“LRSDP: Low-Rank SDP for Triple Patterning Lithography Layout Decomposition”,
ACM/IEEE Design Automation Conference (DAC), San Francisco, Jul. 09–13, 2023.
(paper)
(slides)
(poster)
[C162] Guyue Huang, Yang Bai, Liu Liu, Yuke Wang, Bei Yu, Yufei Ding, Yuan Xie,
“ALCOP: Automatic Load-Compute Pipelining in Deep Learning Compiler for AI-GPUs”,
Conference on Machine Learning and Systems (MLSys), Jun. 04–08, 2023.
(paper)
(slides)
[C159] Yuyang Ye, Tinghuan Chen, Yifei Gao, Hao Yan, Bei Yu, Longxing Shi,
“Fast and Accurate Wire Timing Estimation Based on Graph Learning”,
IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Antwerp, Belgium, Apr. 17–19, 2023.
(paper)
(slides)
[C158] Wei Zhong, Zhenhua Feng, Zhuolun He, Weimin Wang, Yuzhe Ma, Bei Yu,
“Enabling Efficient Design Rule Checking with GPU Acceleration”,
IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Antwerp, Belgium, Apr. 17–19, 2023.
(paper)
(slides)
[C157] Rongliang Fu, Junying Huang, Mengmeng Wang, Yoshikawa Nobuyuki, Bei Yu, Tsung-Yi Ho, Olivia Chen,
“BOMIG: A Majority Logic Synthesis Framework for AQFP Logic”,
IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Antwerp, Belgium, Apr. 17–19, 2023.
(paper)
[C152] Yuyang Ye, Tinghuan Chen, Yifei Gao, Hao Yan, Bei Yu, Longxing Shi,
“Graph-Learning-Driven Path-Based Timing Analysis Results Predictor from Graph-Based Timing Analysis”,
IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), Tokyo Odaiba Miraikan, Jan. 16–19, 2023.
(paper)
(slides)
[J96] Guojin Chen, Ziyang Yu, Hongduo Liu, Yuzhe Ma, Bei Yu,
“DevelSet: Deep Neural Level Set for Instant Mask Optimization”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 42, no. 12, pp. 5020–5033, 2023.
(paper)
[J95] Yuyang Ye, Tinghuan Chen, Yifei Gao, Hao Yan, Bei Yu, Longxing Shi,
“Aging-aware Critical Path Selection via Graph Attention Networks”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 42, no. 12, pp. 5006–5019, 2023.
(paper)
[J93] Wenqian Zhao, Yang Bai, Qi Sun, Wenbo Li, Haisheng Zheng, Nianjuan Jiang, Jiangbo Lu, Bei Yu, Martin D.F. Wong,
“A High-Performance Accelerator for Super-Resolution Processing on Embedded GPU”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 42, no. 10, pp. 3210–3223, 2023.
(paper)
[J92] Peiyu Liao, Dawei Guo, Zizheng Guo, Siting Liu, Yibo Lin, Bei Yu,
“DREAMPlace 4.0: Timing-driven Placement with Momentum-based Net Weighting and Lagrangian-based Refinement”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 42, no. 10, pp. 3374–3387, 2023.
(paper)
[J91] Ziyang Yu, Peiyu Liao, Yuzhe Ma, Bei Yu, Martin D.F. Wong,
“CTM-SRAF: Continuous Transmission Mask-based Constraint-aware Sub Resolution Assist Feature Generation”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 42, no. 10, pp. 3402–3411, 2023.
(paper)
[J90] Su Zheng, Hao Geng, Chen Bai, Bei Yu, Martin Wong,
“Boosting VLSI Design Flow Parameter Tuning with Random Embedding and Multi-objective Trust-region Bayesian Optimization”,
ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 28, no. 05, pp. 1–23, 2023.
(paper)
[J89] Binwu Zhu, Xinyun Zhang, Yibo Lin, Bei Yu, Martin Wong,
“DRC-SG 2.0: Efficient Design Rule Checking Script Generation via Key Information Extraction”,
ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 28, no. 05, pp. 1–18, 2023.
(paper)
[J88] Xiaogang Xu, Yi Wang, Liwei Wang, Bei Yu, Jiaya Jia,
“Conditional Temporal Variational AutoEncoder for Action Video Prediction”,
International Journal of Computer Vision (IJCV), vol. 131, no. 10, pp. 2699–2722, 2023.
(paper)
[J87] Ziyi Wang, Zhuolun He, Chen Bai, Haoyu Yang, Bei Yu,
“Efficient Arithmetic Block Identification with Graph Learning and Network-flow”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 42, no. 08, pp. 2591–2603, 2023.
(paper)
[J86] Siting Liu, Yuan Pu, Peiyu Liao, Hongzhong Wu, Rui Zhang, Zhitang Chen, Wenlong Lv, Yibo Lin, Bei Yu,
“FastGR: Global Routing on CPU-GPU with Heterogeneous Task Graph Scheduler”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 42, no. 07, pp. 2317–2330, 2023.
(paper)
[J85] Yilun Chen, Shijia Huang, Shu Liu, Bei Yu, Jiaya Jia,
“DSGN++: Exploiting Visual-Spatial Relation for Stereo-based 3D Detectors”,
IEEE Transactions on Pattern Analysis and Machine Intelligence (TPAMI), vol. 45, no. 4, pp. 4416–4429, 2023.
(paper)
[J84] Zhuotao Tian, Pengguang Chen, Xin Lai, Li Jiang, Shu Liu, Hengshuang Zhao, Bei Yu, Ming-Chang Yang, Jiaya Jia,
“Adaptive Perspective Distillation for Semantic Segmentation”,
IEEE Transactions on Pattern Analysis and Machine Intelligence (TPAMI), vol. 45, no. 2, pp. 1372–1387, 2023.
(paper)
[J83] Ran Chen, Shoubo Hu, Zhitang Chen, Shengyu Zhu, Bei Yu, Pengyun Li, Cheng Chen, Yu Huang, Jianye Hao,
“A Unified Framework for Layout Pattern Analysis with Deep Causal Estimation”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 42, no. 04, pp. 1199–1211, 2023.
(paper)
[J82] Tinghuan Chen, Grace Li Zhang, Bei Yu, Bing Li, Ulf Schlichtmann,
“Machine Learning in Advanced IC Design: A Methodological Survey”,
IEEE Design & Test, vol. 40, no. 01, pp. 17–33, 2023.
(paper)
(Invited Paper)
[J79] Qi Xu, Junpeng Wang, Qi Sun, Bo Yuan, Song Chen, Bei Yu, Yi Kang, Feng Wu,
“Reliability-Driven Memristive Crossbar Design in Neuromorphic Computing Systems”,
IEEE Transactions on Automation Science and Engineering (TASE), vol. 20, no. 01, pp. 74–87, 2023.
(paper)
[J78] Jianwang Zhai, Chen Bai, Binwu Zhu, Yici Cai, Qiang Zhou, Bei Yu,
“McPAT-Calib: A RISC-V BOOM Microarchitecture Power Modeling Framework”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 42, no. 01, pp. 243–256, 2023.
(paper)
(code)
[J77] Hao Geng, Tinghuan Chen, Yuzhe Ma, Binwu Zhu, Bei Yu,
“PTPT: Physical Design Tool Parameter Tuning via Multi-Objective Bayesian Optimization”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 42, no. 01, pp. 178–189, 2023.
(paper)
2022
[C150] Binwu Zhu, Xinyun Zhang, Yibo Lin, Bei Yu, Martin Wong,
“Efficient Design Rule Checking Script Generation via Key Information Extraction”,
ACM/IEEE Workshop on Machine Learning for CAD (MLCAD), Snowbird, Utah, Sep. 12–13, 2022.
(paper)
(slides)
(video)
(Best Paper Award Nomination)
[C148] Wenqian Zhao, Xufeng Yao, Ziyang Yu, Guojin Chen, Yuzhe Ma, Bei Yu, Martin Wong,
“AdaOPC: A Self-Adaptive Mask Optimization Framework For Real Design Patterns”,
IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Diego, Oct. 30–Nov. 3, 2022.
(paper)
(slides)
(video)
[C146] Liangjian Wen, Yi Zhu, Lei Ye, Guojin Chen, Bei Yu, Jianzhuang Liu, Chunjing Xu,
“LayouTransformer: Generating Layout Patterns with Transformer via Sequential Pattern Modeling”,
IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Diego, Oct. 30–Nov. 3, 2022.
(paper)
(video)
[C144] Xufeng Yao, Yang Bai, Xinyun Zhang, Yuechen Zhang, Qi Sun, Ran Chen, Ruiyu Li, Bei Yu,
“PCL: Proxy-based Contrastive Learning for Domain Generalization”,
IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR), New Orleans, Jun. 19–24, 2022.
(paper)
(poster)
(slides)
(video)
(code)
[C143] Qi Sun, Xinyun Zhang, Hao Geng, Yuxuan Zhao, Yang Bai, Haisheng Zheng, Bei Yu,
“GTuner: Tuning DNN Computations on GPU via Graph Attention Network”,
ACM/IEEE Design Automation Conference (DAC), San Francisco, Jul. 10–14, 2022.
(paper)
(slides)
(video)
[C142] Ziyi Wang, Chen Bai, Zhuolun He, Guangliang Zhang, Qiang Xu, Tsung-Yi Ho, Bei Yu, Yu Huang,
“Functionality Matters in Netlist Representation Learning”,
ACM/IEEE Design Automation Conference (DAC), San Francisco, Jul. 10–14, 2022.
(paper)
(slides)
(video)
[C140] Mingjun Li, Jianlei Yang, Yingjie Qi, Meng Dong, Yuhao Yang, Runze Liu, Weitao Pan, Bei Yu, Weisheng Zhao,
“Eventor: An Efficient Event-Based Monocular Multi-View Stereo Accelerator on FPGA Platform”,
ACM/IEEE Design Automation Conference (DAC), San Francisco, Jul. 10–14, 2022.
(paper)
(slides)
(video)
[C138] Siting Liu, Peiyu Liao, Rui Zhang, Zhitang Chen, Wenlong Lv, Yibo Lin, Bei Yu,
“FastGR: Global Routing on CPU-GPU with Heterogeneous Task Graph Scheduler”,
IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Mar. 14–23, 2022.
(paper)
(slides)
(video)
(Best Paper Award)
[C137] Peiyu Liao, Siting Liu, Zhitang Chen, Wenlong Lv, Yibo Lin, Bei Yu,
“DREAMPlace 4.0: Timing-driven Global Placement with Momentum-based Net Weighting”,
IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Mar. 14–23, 2022.
(paper)
(slides)
(video)
[J76] Tinghuan Chen, Bin Duan, Qi Sun, Meng Zhang, Guoqing Li, Hao Geng, Qianru Zhang, Bei Yu,
“An Efficient Sharing Grouped Convolution via Bayesian Learning”,
IEEE Transactions on Neural Networks and Learning Systems (TNNLS), vol. 33, no. 12, pp. 7367–7379, 2022.
(paper)
[J75] Qi Sun, Xufeng Yao, Arjun Ashok Rao, Bei Yu, Shiyan Hu,
“Counteracting Adversarial Attacks in Autonomous Driving”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 41, no. 12, pp. 5193–5206, 2022.
(paper)
[J74] Xiaodong Wang, Changhao Yan, Yuzhe Ma, Bei Yu, Fan Yang, Dian Zhou, Xuan Zeng,
“Analog Circuit Yield Optimization via Freeze-Thaw Bayesian Optimization Technique”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 41, no. 11, pp. 4887-4900, 2022.
(paper)
[J72] Qi Xu, Hao Geng, Tianming Ni, Song Chen, Bei Yu, Xiaoqing Wen,
“Fortune: A New Fault-Tolerance TSV Configuration in Router-based Redundancy Structure”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 41, no. 10, pp. 3182–3187, 2022.
(paper)
[J71] Martin Rapp, Hussam Amrouch, Yibo Lin, Bei Yu, David Z. Pan, Marilyn Wolf, Jorg Henkel,
“MLCAD: A Survey of Research in Machine Learning for CAD”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 41, no. 10, pp. 3162–3181, 2022.
(paper)
(Keynote Paper)
[J70] Guojin Chen, Wanli Chen, Qi Sun, Yuzhe Ma, Haoyu Yang, Bei Yu,
“DAMO: Deep Agile Mask Optimization for Full Chip Scale”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 41, no. 9, pp. 3118–3131, 2022.
(paper)
[J69] Hao Geng, Yuzhe Ma, Qi Xu, Jin Miao, Subhendu Roy, Bei Yu,
“High-Speed Adder Design Space Exploration via Graph Neural Processes”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 41, no. 8, pp. 2657–2670, 2022.
(paper)
[J68] Hao Geng, Haoyu Yang, Lu Zhang, Fan Yang, Xuan Zeng, Bei Yu,
“Hotspot Detection via Attention-based Deep Layout Metric Learning”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 41, no. 8, pp. 2685–2698, 2022.
(paper)
[J67] Bentian Jiang, Lixin Liu, Yuzhe Ma, Bei Yu, Evangeline F. Y. Young,
“Neural-ILT 2.0: Migrating ILT to Domain-specific and Multi-task-enabled Neural Network”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 41, no. 8, pp. 2671–2684, 2022.
(paper)
[J65] Tinghuan Chen, Qi Sun, Canhui Zhan, Changze Liu, Huatao Yu, Bei Yu,
“Deep H-GCN: Fast Analog IC Aging-induced Degradation Estimation”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 41, no. 7, pp. 1990–2003, 2022.
(paper)
[J64] Yibo Lin, Xiaohan Gao, Tinghuan Chen, Bei Yu,
“Machine learning for digital circuit backend design”,
Micro/nano Electronics and Intelligent Manufacturing, vol. 2, no. 3, 2022. (in Chinese)
(paper)
[J63] Qi Sun, Tinghuan Chen, Siting Liu, Jianli Chen, Hao Yu, Bei Yu,
“Correlated Multi-objective Multi-fidelity Optimization for HLS Directives Design”,
ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 27, no. 4, 2022.
(paper)
[J62] Wei Zhong, Shuxiang Hu, Yuzhe Ma, Haoyu Yang, Xiuyuan Ma, Bei Yu,
“Deep Learning-Driven Simultaneous Layout Decomposition and Mask Optimization”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 41, no. 3, pp. 709–722, 2022.
(paper)
[J61] Ran Chen, Wei Zhong, Haoyu Yang, Hao Geng, Fan Yang, Xuan Zeng, Bei Yu,
“Faster Region-based Hotspot Detection”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 41, no. 3, pp. 669–680, 2022.
(code)
(paper)
[J60] Haoyu Yang, Shuhe Li, Wen Chen, Piyush Pathak, Frank Gennari, Ya-Chieh Lai, Bei Yu,
“DeePattern: Layout Pattern Generation with Transforming Convolutional Auto-Encoder”,
IEEE Transactions on Semiconductor Manufacturing (TSM), vol. 35, no. 1, pp. 67–77, 2022.
(paper)
(Best Paper Award)
[J59] Haocheng Li, Wing-Kai Chow, Gengjie Chen, Bei Yu, and Evangeline F.Y. Young,
“Pin-Accessible Legalization for Mixed-Cell-Height Circuits”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 41, no. 1, pp. 143–154, 2022.
(paper)
2021
[C132] Qi Sun, Chen Bai, Tinghuan Chen, Hao Geng, Xinyun Zhang, Yang Bai, Bei Yu,
“Fast and Efficient DNN Deployment via Deep Gaussian Transfer Learning”,
IEEE International Conference on Computer Vision (ICCV), Oct. 11–17, 2021.
(paper)
(supp)
(slides)
(poster)
[C128] Wenqian Zhao, Qi Sun, Yang Bai, Haisheng Zheng, Wenbo Li, Bei Yu, Martin D.F. Wong,
“A High-Performance Accelerator for Super-Resolution Processing on Embedded GPU”,
IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov. 1–4, 2021.
(paper)
(slides)
(video)
[C127] Ran Chen, Shoubo Hu, Zhitang Chen, Shengyu Zhu, Bei Yu, Pengyun Li, Cheng Chen, Yu Huang, Jianye Hao,
“A Unified Framework for Layout Pattern Analysis with Deep Causal Estimation”,
IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov. 1–4, 2021.
(paper)
(slides)
(video)
[C125] Binwu Zhu, Ran Chen, Xinyun Zhang, Fan Yang, Xuan Zeng, Bei Yu, Martin D.F. Wong,
“Hotspot Detection via Multi-task Learning and Transformer Encoder”,
IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov. 1–4, 2021.
(paper)
(slides)
(video)
[C120] Yifeng Xiao, Miaodi Su, Haoyu Yang, Jianli Chen, Jun Yu, Bei Yu,
“Low-Cost Lithography Hotspot Detection with Active Entropy Sampling and Model Calibration”,
ACM/IEEE Design Automation Conference (DAC), San Francisco, Dec. 5–9, 2021.
(paper)
[C119] Junzhe Cai, Changhao Yan, Yuzhe Ma, Bei Yu, Dian Zhou, Xuan Zeng,
“NeurFill: Migrating Full-Chip CMP Simulators to Neural Networks for Model-Based Dummy Filling Synthesis”,
ACM/IEEE Design Automation Conference (DAC), San Francisco, Dec. 5–9, 2021.
(paper)
[C118] Tinghuan Chen, Qi Sun, Bei Yu,
“Machine Learning in Nanometer AMS Design for Reliability”,
IEEE International Conference on ASIC (ASICON), Kunming, China, Oct. 26–29, 2021.
(paper)
(slides)
(Invited Paper)
[C116] Wei Li, Guojin Chen, Haoyu Yang, Ran Chen, Bei Yu,
“Learning Point Clouds in EDA”,
ACM International Symposium on Physical Design (ISPD), Mar. 21–Mar. 24, 2021.
(paper)
(slides)
(Invited Paper)
[C114] Qi Sun, Tinghuan Chen, Siting Liu, Jin Miao, Jianli Chen, Hao Yu, Bei Yu,
“Correlated Multi-objective Multi-fidelity Optimization for HLS Directives Design”,
IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Feb. 01–05, 2021.
(paper)
(slides)
(video)
(Best Paper Award Nomination)
[C111] Hongjia Li, Mengshu Sun, Tianyun Zhang, Olivia Chen, Nobuyuki Yoshikawa, Bei Yu, Yanzhi Wang, Yibo Lin,
“Towards AQFP-Capable Physical Design Automation”,
IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Feb. 01–05, 2021.
(paper)
[C107] Haoyu Yang, Shifan Zhang, Kang Liu, Siting Liu, Benjamin Tan, Ramesh Karri, Siddharth Garg, Bei Yu, Evangeline F.Y. Young,
“Attacking a CNN-based Layout Hotspot Detector Using Group Gradient Method”,
IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), Jan. 18–21, 2021.
(paper)
(slides)
[J58] Wei Li, Yuzhe Ma, Qi Sun, Lu Zhang, Yibo Lin, Iris Hui-Ru Jiang, Bei Yu, David Z. Pan,
“OpenMPL: An Open Source Layout Decomposer”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 40, no. 11, pp. 2331–2344, 2021.
(paper)
[J57] Haocheng Li, Satwik Patnaik, Mohammed Ashraf, Haoyu Yang, Johann Knechtel, Bei Yu, Ozgur Sinanoglu, Evangeline F.Y. Young,
“Deep Learning Analysis for Split Manufactured Layouts with Routing Perturbation”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 40, no. 10, pp. 1995–2008, 2021.
(paper)
[J56] Guyue Huang, Jingbo Hu, Yifan He, Jialong Liu, Mingyuan Ma, Zhaoyang Shen, Juejian Wu, Yuanfan Xu, Hengrui Zhang,
Kai Zhong, Xuefei Ning, Yuzhe Ma, Haoyu Yang, Bei Yu, Huazhong Yang, Yu Wang,
“Machine Learning for Electronic Design Automation: A Survey”,
ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 25, no. 5, 2021.
(paper)
[J55] Yiyang Jiang, Fan Yang, Bei Yu, Dian Zhou, Xuan Zeng,
“Efficient Layout Hotspot Detection via Binarized Residual Neural Network Ensemble”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 40, no. 7, pp. 1476–1488, 2021.
(paper)
[J54] Haoyu Yang, Shuhe Li, Cyrus Tabery, Bingqing Lin, Bei Yu,
“Bridging the Gap Between Layout Pattern Sampling and Hotspot Detection via Batch Active Learning”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 40, no. 7, pp. 1464–1475, 2021.
(paper)
(benchmark)
[J53] Tinghuan Chen, Bingqing Lin, Hao Geng, Shiyan Hu, Bei Yu,
“Leveraging Spatial Correlation for Sensor Drift Calibration in Smart Building”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 40, no. 7, pp. 1273–1286, 2021.
(paper)
[J52] Haoyu Yang, Wei Zhong, Yuzhe Ma, Hao Geng, Ran Chen, Wanli Chen, Bei Yu,
“VLSI Mask Optimization: From Shallow To Deep Learning”,
Integration, the VLSI Journal, vol. 77, Mar., pp. 96–103, 2021.
(paper)
[J51] Xiaowei Xu, Xinyi Zhang, Bei Yu, Xiaobo Sharon Hu, Christopher Rowen, Jingtong Hu, Yiyu Shi,
“DAC-SDC Low Power Object Detection Challenge for UAV Applications”,
IEEE Transactions on Pattern Analysis and Machine Intelligence (TPAMI), vol. 43, no. 2, pp. 392–403, 2021.
(paper)
2020
[C106] Hao Geng, Haoyu Yang, Lu Zhang, Jin Miao, Fan Yang, Xuan Zeng, Bei Yu,
“Hotspot Detection via Attention-based Deep Layout Metric Learning”,
IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov. 2–5, 2020.
(paper)
(slides)
(whova)
[C101] Zhuolun He, Yuzhe Ma, Lu Zhang, Peiyu Liao, Ngai Wong, Bei Yu, Martin D. F. Wong,
“Learn to Floorplan through Acquisition of Effective Local Search Heuristics”,
IEEE International Conference on Computer Design (ICCD), Oct. 18–21, 2020.
(paper)
(slides)
[C100] Wanli Chen, Xinge Zhu, Ruoqi Sun, Junjun He, Ruiyu Li, Xiaoyong Shen, Bei Yu,
“Tensor Low-Rank Reconstruction for Semantic Segmentation”,
European Conference on Computer Vision (ECCV), August 23–28, 2020.
(paper)
(slides)
(code)
[C98] Wei Li, Jialu Xia, Yuzhe Ma, Jialu Li, Yibo Lin, Bei Yu,
“Adaptive Layout Decomposition with Graph Embedding Neural Networks”,
ACM/IEEE Design Automation Conference (DAC), San Francisco, July 19–23, 2020.
(paper)
(slides)
[C97] Wei Zhong, Shuxiang Hu, Yuzhe Ma, Haoyu Yang, Xiuyuan Ma, Bei Yu,
“Deep Learning-Driven Simultaneous Layout Decomposition and Mask Optimization”,
ACM/IEEE Design Automation Conference (DAC), San Francisco, July 19–23, 2020.
(paper)
(slides)
[C96] Husheng Zhou, Wei Li, Zelun Kong, Junfeng Guo, Yuqun Zhang, Bei Yu, Lingming Zhang, Cong Liu,
“DeepBillboard: Systematic Physical-World Testing of Autonomous Driving Systems”,
ACM/IEEE International Conference on Software Engineering (ICSE), Seoul, May 23–29, 2020.
(paper)
[C95] Junpeng Wang, Qi Xu, Bo Yuan, Song Chen, Bei Yu, Feng Wu,
“Reliability-Driven Neural Network Training for Memristive Crossbar-Based Neuromorphic Computing Systems”,
IEEE International Symposium on Circuits and Systems (ISCAS), Sevilla, Spain, May 17–20, 2020.
(paper)
[C94] Yuzhe Ma, Zhuolun He, Wei Li, Tinghuan Chen, Lu Zhang, Bei Yu,
“Understanding Graphs in EDA: From Shallow to Deep Learning”,
ACM International Symposium on Physical Design (ISPD), Taipei, Mar. 25–Apr. 01, 2020.
(paper)
(Invited Paper)
[C93] Haoyu Yang, Wei Zhong, Yuzhe Ma, Hao Geng, Ran Chen, Wanli Chen, Bei Yu,
“VLSI Mask Optimization: From Shallow To Deep Learning”,
IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), pp. 434–439, Beijing, Jan. 13–16, 2020.
(paper)
(slides)
(Invited Paper)
[J50] Yuzhe Ma, Wei Zhong, Shuxiang Hu, Jhih-Rong Gao, Jian Kuang, Jin Miao, Bei Yu,
“A Unified Framework for Simultaneous Layout Decomposition and Mask Optimization”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 39, no. 12, pp. 5069–5082, 2020.
(paper)
[J49] Grace Li Zhang, Bing Li, Meng Li, Bei Yu, David Z. Pan, Michaela Brunner, Georg Sigl, Ulf Schlichtmann,
“TimingCamouflage+: Netlist Security Enhancement with Unconventional Timing”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 39, no. 12, pp. 4482–4495, 2020.
(paper)
[J48] Hao Geng, Wei Zhong, Haoyu Yang, Yuzhe Ma, Joydeep Mitra, Bei Yu,
“SRAF Insertion via Supervised Dictionary Learning”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 39, no. 10, pp. 2849–2859, 2020.
(paper)
[J47] Haoyu Yang, Shuhe Li, Zihao Deng, Yuzhe Ma, Bei Yu, Evangeline F. Y. Young,
“GAN-OPC: Mask Optimization with Lithography-guided Generative Adversarial Nets”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 39, no. 10, pp. 2822–2834, 2020.
(paper)
[J46] Kang Liu, Haoyu Yang, Yuzhe Ma, Benjamin Tan, Bei Yu, Evangeline F. Y. Young, Ramesh Karri, Siddharth Garg,
“Adversarial Perturbation Attacks on ML-based CAD: A Case Study on CNN-based Lithographic Hotspot Detection”,
ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 25, no. 5, 2020.
(paper)
[J45] Qi Xu, Song Chen, Hao Geng, Bo Yuan, Bei Yu, Feng Wu, Zhengfeng Huang,
“Fault Tolerance in Memristive Crossbar-Based Neuromorphic Computing Systems”,
Integration, the VLSI Journal, vol. 70, Jan., pp. 70–79, 2020.
(paper)
[J44] Xingquan Li, Bei Yu, Jianli Chen, Wenxing Zhu,
“DSA Guiding Template Assignment with Multiple Redundant Via and Dummy Via Insertion”,
Integration, the VLSI Journal, vol. 70, Jan., pp. 32–42, 2020.
(paper)
2019
[C91] Yuzhe Ma, Ran Chen, Wei Li, Fanhua Shang, Wenjian Yu, Minsik Cho, Bei Yu,
“A Unified Approximation Framework for Compressing and Accelerating Deep Neural Networks”,
IEEE International Conference on Tools with Artificial Intelligence (ICTAI), Portland, OR, Nov. 4–6, 2019.
(paper)
(slides)
(Best Student Paper Award)
[C90] Wei Li, Yuzhe Ma, Qi Sun, Yibo Lin, Iris Hui-Ru Jiang, Bei Yu, David Z. Pan,
“OpenMPL: An Open Source Layout Decomposer”,
IEEE International Conference on ASIC (ASICON), Chongqing, China, Oct. 29–Nov. 1, 2019.
(paper)
(slides)
(code)
(Invited Paper)
[C88] Haoyu Yang, Wen Chen, Piyush Pathak, Frank Gennari, Ya-Chieh Lai, Bei Yu,
“Automatic Layout Generation with Applications in Machine Learning Engine Evaluation”,
ACM/IEEE Workshop on Machine Learning for CAD (MLCAD), Alberta, Canada, Sep. 3–4, 2019.
(paper)
(slides)
[C87] Zhonghua Zhou, Ziran Zhu, Jianli Chen, Yuzhe Ma, Bei Yu, Tsung-Yi Ho, Guy Lemieux, Andre Ivano,
“Congestion-aware Global Routing using Deep Convolutional Generative Adversarial Networks”,
ACM/IEEE Workshop on Machine Learning for CAD (MLCAD), Alberta, Canada, Sep. 3–4, 2019.
(paper)
[C86] Haoyu Yang, Piyush Pathak, Frank Gennari, Ya-Chieh Lai, Bei Yu,
“DeePattern: Layout Pattern Generation with Transforming Convolutional Auto-Encoder”,
ACM/IEEE Design Automation Conference (DAC), pp. 148:1–148:6, Las Vegas, NV, June 2–6, 2019.
(paper)
(slides)
(poster)
[C85] Yuzhe Ma, Haoxing Ren, Brucek Khailany, Harbinder Sikka, Lijuan Luo, Karthikeyan Natarajan, Bei Yu,
“High Performance Graph Convolutional Networks with Applications in Testability Analysis”,
ACM/IEEE Design Automation Conference (DAC), pp. 18:1–18:6, Las Vegas, NV, June 2–6, 2019.
(paper)
(slides)
(poster)
[C84] Tinghuan Chen, Bingqing Lin, Hao Geng, Bei Yu,
“Sensor Drift Calibration via Spatial Correlation Model in Smart Building”,
ACM/IEEE Design Automation Conference (DAC), pp. 105:1–105:6, Las Vegas, NV, June 2–6, 2019.
(paper)
(slides)
(poster)
[C83] Ran Chen, Wei Zhong, Haoyu Yang, Hao Geng, Xuan Zeng, Bei Yu,
“Faster Region-based Hotspot Detection”,
ACM/IEEE Design Automation Conference (DAC), pp. 146:1–146:6, Las Vegas, NV, June 2–6, 2019.
(paper)
(slides)
(poster)
(code)
[C82] Yiyang Jiang, Fan Yang, Hengliang Zhu, Bei Yu, Dian Zhou, Xuan Zeng,
“Efficient Layout Hotspot Detection via Binarized Residual Neural Network”,
ACM/IEEE Design Automation Conference (DAC), pp. 147:1–147:6, Las Vegas, NV, June 2–6, 2019.
(paper)
(slides)
(poster)
[C81] Haocheng Li, Satwik Patnaik, Abhrajit Sengupta, Haoyu Yang, Johann Knechtel, Bei Yu, Evangeline F. Y. Young, Ozgur Sinanoglu,
“Attacking Split Manufacturing from a Deep Learning Perspective”,
ACM/IEEE Design Automation Conference (DAC), pp. 135:1–135:6, Las Vegas, NV, June 2–6, 2019.
(paper)
(slides)
(poster)
[C80] Bentian Jiang, Xiaopeng Zhang, Ran Chen, Gengjie Chen, Peishan Tu, Wei Li, Evangeline F. Y. Young, Bei Yu,
“FIT: Fill Insertion Considering Timing”,
ACM/IEEE Design Automation Conference (DAC), pp. 221:1–221:6, Las Vegas, NV, June 2–6, 2019.
(paper)
(slides)
(poster)
[C78] Haoyu Yang, Piyush Pathak, Frank Gennari, Ya-Chieh Lai, Bei Yu,
“Detecting Multi-Layer Layout Hotspots with Adaptive Squish Patterns”,
IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), pp. 299–304, Tokyo, Jan. 21–24, 2019.
(paper)
(slides)
(Invited Paper)
[C76] Hao Geng, Haoyu Yang, Yuzhe Ma, Joydeep Mitra, Bei Yu,
“SRAF Insertion via Supervised Dictionary Learning”,
IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), pp. 406–411, Tokyo, Jan. 21–24, 2019.
(paper)
(slides)
(Best Paper Award Nomination)
[C75] Zheng Zhao, Derong Liu, Meng Li, Zhoufeng Ying, Biying Xu, Lu Zhang, Bei Yu, Ray T. Chen, David Z. Pan,
“Hardware-software Co-design of Slimmed Optical Neural Networks”,
IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), pp. 705–710, Tokyo, Jan. 21–24, 2019.
(paper)
(slides)
[J43] Yuzhe Ma, Subhendu Roy, Jin Miao, Jiamin Chen, Bei Yu,
“Cross-layer Optimization for High Speed Adders: A Pareto Driven Machine Learning Approach”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 38, no. 12, pp. 2298–2311, 2019.
(paper)
[J42] Qi Xu, Hao Geng, Song Chen, Bei Yu, Feng Wu,
“Memristive Crossbar Mapping for Neuromorphic Computing Systems on 3D IC”,
ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 25, no. 1, pp. 8:1–8:19, 2019.
(paper)
[J41] Meng Li, Bei Yu, Yibo Lin, Xiaoqing Xu, Wuxi Li, David Z. Pan,
“A Practical Split Manufacturing Framework for Trojan Prevention via Simultaneous Wire Lifting and Cell Insertion”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 38, no. 9, pp. 1585–1598, 2019.
(paper)
[J40] Meng Li, Kaveh Shamsi, Travis Meade, Zheng Zhao, Bei Yu, Yier Jin, David Z. Pan,
“Provably Secure Camouflaging Strategy for IC Protection”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 38, no. 8, pp. 1399–1412, 2019.
(paper)
[J39] Haoyu Yang, Jing Su, Yi Zou, Yuzhe Ma, Bei Yu, Evangeline F. Y. Young,
“Layout Hotspot Detection with Feature Tensor Generation and Deep Biased Learning”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 38, no. 6, pp. 1175–1187, 2019.
(paper)
(code)
[J38] Derong Liu, Bei Yu, Vinicius Livramento, Salim Chowdhury, Duo Ding, Huy Vo, Akshay Sharma, David Z. Pan,
“Synergistic Topology Generation and Route Synthesis for On-Chip Performance-Critical Signal Groups”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 38, no. 6, pp. 1147–1160, 2019.
(paper)
[J36] Qianru Zhang, Meng Zhang, Tinghuan Chen, Zhifei Sun, Yuzhe Ma, Bei Yu,
“Recent Advances in Convolutional Neural Network Acceleration”,
Neurocomputing, vol. 323, pp. 37–51, Jan., 2019.
(paper)
2018
[C74] Hao Geng, Haoyu Yang, Bei Yu, Xingquan Li, Xuan Zeng,
“Sparse VLSI Layout Feature Extraction: A Dictionary Learning Approach”,
IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp. 488–493, Hong Kong, July 9–11, 2018.
(paper)
(Invited Paper)
[C73] Haoyu Yang, Shuhe Li, Yuzhe Ma, Bei Yu, Evangeline F. Y. Young,
“GAN-OPC: Mask Optimization with Lithography-guided Generative Adversarial Nets”,
ACM/IEEE Design Automation Conference (DAC), pp. 131:1–131:6, San Francisco, June 24–28, 2018.
(paper)
(slides)
(poster)
[C72] Haocheng Li, Wing-Kai Chow, Gengjie Chen, Evangeline F. Y. Young, Bei Yu,
“Routability-Driven and Fence-Aware Legalization for Mixed-Cell-Height Circuits”,
ACM/IEEE Design Automation Conference (DAC), pp. 150:1–150:6, San Francisco, June 24–28, 2018.
(paper)
(slides)
(poster)
[C71] Fengxian Jiao, Sheqin Dong, Bei Yu, Bing Li, Ulf Schlichtmann,
“Thermal-Aware Placement and Routing for 3D Optical Networks-on-Chips”,
IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1–4, Florence, May 27–30, 2018.
(paper)
[C70] Qi Xu, Song Chen, Bei Yu, Feng Wu,
“Memristive Crossbar Mapping for Neuromorphic Computing Systems on 3D IC”,
ACM Great Lakes Symposium on VLSI (GLSVLSI), pp. 451–454, Chicago, IL, May 23–25, 2018.
(paper)
[C69] Wei Ye, Meng Li, Kai Zhong, Bei Yu, David Z. Pan,
“Power Grid Reduction by Sparse Convex Optimization”,
ACM International Symposium on Physical Design (ISPD), pp. 60–67, Monterey, Mar. 25–28, 2018.
(paper)
(slides)
[C68] Grace Li Zhang, Bing Li, Bei Yu, David Z. Pan, Ulf Schlichtmann,
“TimingCamouflage: Improving Circuit Security against Counterfeiting by Unconventional Timing”,
IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), pp. 91–96, Dresden, Mar. 19–23, 2018.
(paper)
(slides)
[C67] Meng Li, Bei Yu, Yibo Lin, Xiaoqing Xu, Wuxi Li, David Z. Pan,
“A Practical Split Manufacturing Framework for Trojan Prevention via Simultaneous Wire Lifting and Cell Insertion”,
IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), pp. 265–270, Jeju Island, Jan. 22–25, 2018.
(paper)
(slides)
[J35] Xingquan Li, Bei Yu, Jiaojiao Ou, Jianli Chen, David Z. Pan, Wenxing Zhu,
“Graph Based Redundant Via Insertion and Guiding Template Assignment for DSA-MP”,
IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 26, no. 11, pp. 2504–2517, 2018.
(paper)
[J33] Gengjie Chen, Chak-Wa Pui, Wing-Kai Chow, Ka-Chun Lam, Jian Kuang, Evangeline F. Y. Young, Bei Yu,
“RippleFPGA: Routability-Driven Simultaneous Packing and Placement for Modern FPGAs”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 37, no. 10, pp. 2022–2035, 2018.
(paper)
[J30] Yibo Lin, Bei Yu, Xiaoqing Xu, Jhih-Rong Gao, Natarajan Viswanathan, Wen-Hao Liu, Zhuo Li, Charles J. Alpert, David Z. Pan,
“MrDP: Multiple-row Detailed Placement of Heterogeneous-sized Cells for Advanced Nodes”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 37, no. 6, pp. 1237–1250, 2018.
(paper)
[J29] Jin Miao, Meng Li, Subhendu Roy, Yuzhe Ma, Bei Yu,
“SD-PUF: Spliced Digital Physical Unclonable Function”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 37, no. 5, pp. 927–940, 2018.
(paper)
2017
[C66] Chak-Wa Pui, Gengjie Chen, Yuzhe Ma, Evangeline F. Y. Young, Bei Yu,
“Clock-Aware UltraScale FPGA Placement with Machine Learning Routability Prediction”,
IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 929–936, Irvine, Nov. 13–16, 2017.
(paper)
(slides)
(Invited Paper)
[C65] Yuzhe Ma, Jhih-Rong Gao, Jian Kuang, Jin Miao, Bei Yu,
“A Unified Framework for Simultaneous Layout Decomposition and Mask Optimization”,
IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 81–88, Irvine, Nov. 13–16, 2017.
(paper)
(slides)
[C62] Haoyu Yang, Yajun Lin, Bei Yu, Evangeline F. Y. Young,
“Lithography Hotspot Detection: From Shallow To Deep Learning”,
IEEE International System-on-Chip Conference (SOCC), pp. 233–238, Munich, Germany, September 5–8, 2017.
(paper)
(Invited Paper)
[C60] Haoyu Yang, Jing Su, Yi Zou, Bei Yu, Evangeline F. Y. Young,
“Layout Hotspot Detection with Feature Tensor Generation and Deep Biased Learning”,
ACM/IEEE Design Automation Conference (DAC), pp. 62:1–62:6, Austin, June 18–22, 2017.
(paper)
(slides)
(poster)
[C59] Gengjie Chen, Jian Kuang, Zhiliang Zeng, Hang Zhang, Evangeline F. Y. Young, Bei Yu,
“Minimizing Thermal Gradient and Pumping Power in 3D IC Liquid Cooling Network Design”,
ACM/IEEE Design Automation Conference (DAC), pp. 70:1–70:6, Austin, June 18–22, 2017.
(paper)
(slides)
(poster)
[C57] Hang Zhang, Fengyuan Zhu, Haocheng Li, Evangeline F. Y. Young, Bei Yu,
“Bilinear Lithography Hotspot Detection”,
ACM International Symposium on Physical Design (ISPD), pp. 7–14, Portland, OR, Mar. 19–22, 2017.
(paper)
(Best Paper Award)
[C56] Jiaojiao Ou, Bei Yu, Xiaoqing Xu, Joydeep Mitra, Yibo Lin, David Z. Pan,
“DSAR: DSA aware Routing with Simultaneous DSA Guiding Pattern and Double Patterning Assignment”,
ACM International Symposium on Physical Design (ISPD), pp. 91–98, Portland, OR, Mar. 19–22, 2017.
(paper)
(slides)
[J26] Haoyu Yang, Luyang Luo, Jing Su, Chenxi Lin, Bei Yu,
“Imbalance Aware Lithography Hotspot Detection: A Deep Learning Approach”,
Journal of Micro/Nanolithography, MEMS, and MOEMS (JM3), vol. 16, no. 3, 033504, 2017.
(paper)
[J25] Yibo Lin, Xiaoqing Xu, Bei Yu, Ross Baldick, David Z. Pan,
“Triple/Quadruple Patterning Layout Decomposition via Novel Linear Programming and Iterative Rounding”,
Journal of Micro/Nanolithography, MEMS, and MOEMS (JM3), vol. 16, no. 2, 023507, 2017.
(paper)
[J20] Vinicius Livramento, Derong Liu, Salim Chowdhury, Bei Yu, Xiaoqing Xu, David Z. Pan, Jose Luis Guntzel, Luiz C. V. dos Santos,
“Incremental Layer Assignment Driven by an External Signoff Timing Engine”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 36, no. 7, pp. 1126–1139, 2017.
(paper)
[J19] Yibo Lin, Bei Yu, Yi Zou, Zhuo Li, Charles J. Alpert, David Z. Pan,
“Stitch Aware Detailed Placement for Multiple E-Beam Lithography”,
Integration, the VLSI Journal, vol. 58, June, pp. 47–54, 2017.
(paper)
(Best Paper Award)
2016
[C54] Chak-Wa Pui, Gengjie Chen, Wing-Kai Chow, Jian Kuang, Ka-Chun Lam, Peishan Tu, Hang Zhang, Evangeline F. Y. Young, Bei Yu,
“RippleFPGA: A Routability-Driven Placement for Large-Scale Heterogeneous FPGAs”,
IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 67:1–67:8, Austin, Nov. 7–10, 2016.
(paper)
(slides)
(Invited Paper)
[C50] Meng Li, Kaveh Shamsi, Travis Meade, Zheng Zhao, Bei Yu, Yier Jin, David Z. Pan,
“Provably Secure Camouflaging Strategy for IC Protection”,
IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 28:1–28:8, Austin, Nov. 7–10, 2016.
(paper)
(slides)
[C49] Yibo Lin, Bei Yu, Xiaoqing Xu, Jhih-Rong Gao, Natarajan Viswanathan, Wen-Hao Liu, Zhuo Li, Charles J. Alpert, David Z. Pan,
“MrDP: Multiple-row Detailed Placement of Heterogeneous-sized Cells for Advanced Nodes”,
IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 7:1–7:8, Austin, Nov. 7–10, 2016.
(paper)
(slides)
[C45] Xiaotao Jia, Qiang Zhou, Yici Cai, Bei Yu,
“MCFRoute 2.0: A Redundant Via Insertion Enhanced Concurrent Detailed Router”,
ACM Great Lakes Symposium on VLSI (GLSVLSI), pp. 87–92, Boston, MA, May 18–20, 2016.
(paper)
(slides)
[C41] Yibo Lin, Bei Yu, Yi Zou, Zhuo Li, Charles J. Alpert, David Z. Pan,
“Stitch Aware Detailed Placement for Multiple E-Beam Lithography”,
IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), pp. 186–191, Macau, Jan. 25–28, 2016.
(paper)
(slides)
[J16] Tetsuaki Matsunawa, Bei Yu, David Z. Pan,
“Laplacian Eigenmaps and Bayesian Clustering Based Layout Pattern Sampling and Its Applications to Hotspot Detection and OPC”,
Journal of Micro/Nanolithography, MEMS, and MOEMS (JM3), vol. 15, no. 4, 043504, 2016.
(paper)
[J15] Bei Yu, Xiaoqing Xu, Subhendu Roy, Yibo Lin, Jiaojiao Ou, David Z. Pan,
“Design for Manufacturability and Reliability in Extreme-Scaling VLSI”,
Science China Information Sciences (SCIS), vol.59, June, 061406:2, 2016.
(paper)
[J14] Bei Yu, Kun Yuan, Jhih-Rong Gao, Shiyan Hu, David Z. Pan,
“EBL Overlapping aware Stencil Planning for MCC System”,
ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 21, no. 3, pp. 43:1–43:24, 2016.
(paper)
[J13] Xiaoqing Xu, Bei Yu, Jhih-Rong Gao, Che-Lun Hsu, David Z. Pan,
“PARR: Pin Access Planning and Regular Routing for Self-Aligned Double Patterning”,
ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 21, no. 3, pp. 42:1–42:21, 2016.
(paper)
[J12] Tetsuaki Matsunawa, Bei Yu, David Z. Pan,
“Optical Proximity Correction with Hierarchical Bayes Model”,
Journal of Micro/Nanolithography, MEMS, and MOEMS (JM3), vol. 15, no. 2, 021009, 2016.
(paper)
[J11] Xiaoqing Xu, Brian Cline, Greg Yeric, Bei Yu, David Z. Pan,
“Systematic Framework for Evaluating Standard Cell Middle-Of-Line (MOL) Robustness for Multiple Patterning Lithography”,
Journal of Micro/Nanolithography, MEMS, and MOEMS (JM3), vol. 15, no. 2, 021202, 2016.
(paper)
2015
[C38] David Z. Pan, Lars Liebmann, Bei Yu, Xiaoqing Xu, Yibo Lin,
“Pushing Multiple Patterning in Sub-10nm: Are We Ready?”,
ACM/IEEE Design Automation Conference (DAC), pp. 197:1–197:6, San Francisco, June 7–11, 2015.
(paper)
(Invited Paper)
[C37] Xiaoqing Xu, Bei Yu, Jhih-Rong Gao, Che-Lun Hsu, David Z. Pan,
“PARR: Pin Access Planning and Regular Routing for Self-Aligned Double Patterning”,
ACM/IEEE Design Automation Conference (DAC), pp. 28:1–28:6, San Francisco, June 7–11, 2015.
(paper)
(slides)
[C35] Wei Ye, Bei Yu, Yong-Chan Ban, Lars Liebmann, David Z. Pan,
“Standard Cell Layout Regularity and Pin Access Optimization Considering Middle-of-Line”,
ACM Great Lakes Symposium on VLSI (GLSVLSI), pp. 289–294, Pittsburgh, PA, May 20–22, 2015.
(paper)
(slides)
[C34] Jiaojiao Ou, Bei Yu, Jhih-Rong Gao, Moshe Preil, Azat Latypov, David Z. Pan,
“Directed Self-Assembly Based Cut Mask Optimization for Unidirectional Design”,
ACM Great Lakes Symposium on VLSI (GLSVLSI), pp. 83–86, Pittsburgh, PA, May 20–22, 2015.
(paper)
[J10] Jiaojiao Ou, Bei Yu, Jhih-Rong Gao, David Z. Pan,
“Directed Self-Assembly Cut Mask Assignment for 1D Design”,
Journal of Micro/Nanolithography, MEMS, and MOEMS (JM3), vol. 14, no. 3, 031211, 2015.
(paper)
[J9] Xiaoqing Xu, Brian Cline, Greg Yeric, Bei Yu, David Z. Pan,
“Self-Aligned Double Patterning Aware Pin Access and Standard Cell Layout Co-Optimization”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 34, no. 5, pp. 699–712, 2015.
(paper)
[J8] Bei Yu, Xiaoqing Xu, Jhih-Rong Gao, Yibo Lin, Zhuo Li, Charles Alpert, David Z. Pan,
“Methodology for Standard Cell Compliance and Detailed Placement for Triple Patterning Lithography”,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 34, no. 5, pp. 726–739, 2015.
(paper)
[J6] Bei Yu, Jhih-Rong Gao, Duo Ding, Xuan Zeng, David Z. Pan,
“Accurate Lithography Hotspot Detection based on PCA-SVM Classifier with Hierarchical Data Clustering”,
Journal of Micro/Nanolithography, MEMS, and MOEMS (JM3), vol. 14, no. 1, 011003, 2015.
(paper)
[J5] Bei Yu, Subhendu Roy, Jhih-Rong Gao, David Z. Pan,
“Triple-patterning lithography (TPL) layout decomposition using end-cutting”,
Journal of Micro/Nanolithography, MEMS, and MOEMS (JM3), vol. 14, no. 1, 011002, 2015.
(paper)
2014
[C24] Xiaoqing Xu, Brian Cline, Greg Yeric, Bei Yu, David Z. Pan,
“Self-Aligned Double Patterning Aware Pin Access and Standard Cell Layout Co-Optimization”,
ACM International Symposium on Physical Design (ISPD), pp. 101–108, Petaluma, March 30–April 2, 2014.
(paper)
2013
[C19] Bei Yu, Yen-Hung Lin, Gerard Luk-Pat, Duo Ding, Kevin Lucas, David Z. Pan,
“A High-Performance Triple Patterning Layout Decomposer with Balanced Density”,
IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 163–169, San Jose, Nov. 18–21, 2013.
(paper)
(slides)
[C18] Jhih-Rong Gao, Bei Yu, Duo Ding, David Z. Pan,
“Lithography Hotspot Detection and Mitigation in Nanometer VLSI”,
IEEE International Conference on ASIC (ASICON), pp. 1–4, Shenzhen, China, Oct. 28–31, 2013.
(paper)
(Invited Paper)
2012
[C13] Bei Yu, Jhih-Rong Gao, Duo Ding, Yongchan Ban, Jae-Seok Yang, Kun Yuan, Minsik Cho, David Z. Pan,
“Dealing with IC Manufacturability in Extreme Scaling”,
IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 240–242, San Jose, Nov. 5–8, 2012.
(paper)
(Embedded Tutorial paper)
[C9] Duo Ding, Bei Yu, Joydeep Ghosh, David Z. Pan,
“EPIC: Efficient Prediction of IC Manufacturing Hotspots With A Unified Meta-Classification Formulation”,
IEEE/ACM Asia and South Pacific Design Automation Conference (ASPDAC), pp. 263–270, Sydney, Australia, Jan. 30–Feb. 3, 2012.
(paper)
(Best Paper Award)
[J2] Wei Zhong, Takeshi Yoshimura, Bei Yu, Song Chen, Sheqin Dong, Satoshi Goto,
“Cluster Generation and Network Component Insertion for Topology Synthesis of Application-Specific Network-on-Chips”,
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, vol. E95-C, no. 4, pp. 535–545, 2012.
(paper)
2011
[C6] Bei Yu, Sheqin Dong, Yuchun Ma, Tao Lin, Yu Wang, Song Chen, Satoshi Goto,
“Network Flow-based Simultaneous Retiming and Slack Budgeting for Low Power Design”,
IEEE/ACM Asia and South Pacific Design Automation Conference (ASPDAC), pp. 473–478, Japan, Jan. 2011.
(paper)
(slides)
[C5] Wei Zhong, Bei Yu, Song Chen, Takeshi Yoshimura, Sheqin Dong, Satoshi Goto,
“Application- Specific Network-on-Chip Synthesis: Cluster Generation and Network Component Insertion”,
IEEE International Symposium on Quality Electronic Design (ISQED), pp. 144–149, Santa Clara, March 14–16, 2011.
(paper)
2010
[C3] Tao Lin, Sheqin Dong, Bei Yu, Song Chen, Satoshi Goto,
“A Revisit to Voltage Partitioning Problem”,
ACM Great Lakes Symposium on VLSI (GLSVLSI), pp. 115–118, Providence, RI, May 16–18, 2010.
(paper)
2009
[C1] Bei Yu, Sheqin Dong, Song Chen, Satoshi Goto,
“Voltage-Island Driven Floorplanning Considering Level-Shifter Positions”,
ACM Great Lakes Symposium on VLSI (GLSVLSI), pp. 51–56, Boston, MA, May 10–12, 2009.
(paper)
Books / Book Chapters
Dissertation
Newsletters
[N2] Bei Yu, Gilda Garreton, David Z. Pan,
“Layout Compliance for Triple Patterning Lithography: An Iterative Approach”,
SPIE Newsroom.
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