\hypertarget{btl__ofud_8h}{\section{ompi/mca/btl/ofud/btl\+\_\+ofud.h File Reference}
\label{btl__ofud_8h}\index{ompi/mca/btl/ofud/btl\+\_\+ofud.\+h@{ompi/mca/btl/ofud/btl\+\_\+ofud.\+h}}
}
{\ttfamily \#include \char`\"{}ompi\+\_\+config.\+h\char`\"{}}\\*
{\ttfamily \#include $<$sys/types.\+h$>$}\\*
{\ttfamily \#include $<$infiniband/verbs.\+h$>$}\\*
{\ttfamily \#include \char`\"{}opal/class/opal\+\_\+hash\+\_\+table.\+h\char`\"{}}\\*
{\ttfamily \#include \char`\"{}ompi/class/ompi\+\_\+free\+\_\+list.\+h\char`\"{}}\\*
{\ttfamily \#include \char`\"{}ompi/mca/btl/btl.\+h\char`\"{}}\\*
{\ttfamily \#include \char`\"{}ompi/mca/btl/base/btl\+\_\+base\+\_\+error.\+h\char`\"{}}\\*
{\ttfamily \#include \char`\"{}ompi/mca/btl/base/base.\+h\char`\"{}}\\*
{\ttfamily \#include \char`\"{}ompi/mca/mpool/mpool.\+h\char`\"{}}\\*
{\ttfamily \#include \char`\"{}btl\+\_\+ofud\+\_\+endpoint.\+h\char`\"{}}\\*
\subsection*{Data Structures}
\begin{DoxyCompactItemize}
\item 
struct \hyperlink{structmca__btl__ud__component__t}{mca\+\_\+btl\+\_\+ud\+\_\+component\+\_\+t}
\begin{DoxyCompactList}\small\item\em U\+D Infiniband (I\+B) B\+T\+L component. \end{DoxyCompactList}\item 
struct \hyperlink{structmca__btl__ud__module__t}{mca\+\_\+btl\+\_\+ud\+\_\+module\+\_\+t}
\begin{DoxyCompactList}\small\item\em U\+D/\+I\+B B\+T\+L Interface. \end{DoxyCompactList}\end{DoxyCompactItemize}
\subsection*{Macros}
\begin{DoxyCompactItemize}
\item 
\hypertarget{btl__ofud_8h_a257b69a878e98477245b67e6e13f2351}{\#define {\bfseries M\+C\+A\+\_\+\+B\+T\+L\+\_\+\+U\+D\+\_\+\+N\+U\+M\+\_\+\+Q\+P}~4}\label{btl__ofud_8h_a257b69a878e98477245b67e6e13f2351}

\item 
\hypertarget{btl__ofud_8h_a50590378de86691bbaeb487344323cb6}{\#define \hyperlink{btl__ofud_8h_a50590378de86691bbaeb487344323cb6}{M\+C\+A\+\_\+\+B\+T\+L\+\_\+\+U\+D\+\_\+\+E\+N\+A\+B\+L\+E\+\_\+\+P\+R\+O\+F\+I\+L\+E}~0}\label{btl__ofud_8h_a50590378de86691bbaeb487344323cb6}

\begin{DoxyCompactList}\small\item\em Profiling variables. \end{DoxyCompactList}\item 
\hypertarget{btl__ofud_8h_a495f5641da453972bfac1f4d2ea1d234}{\#define {\bfseries M\+C\+A\+\_\+\+B\+T\+L\+\_\+\+U\+D\+\_\+\+S\+T\+A\+R\+T\+\_\+\+T\+I\+M\+E}(var)}\label{btl__ofud_8h_a495f5641da453972bfac1f4d2ea1d234}

\item 
\hypertarget{btl__ofud_8h_a5162845967469e8adaaf2e51d183a954}{\#define {\bfseries M\+C\+A\+\_\+\+B\+T\+L\+\_\+\+U\+D\+\_\+\+E\+N\+D\+\_\+\+T\+I\+M\+E}(var)}\label{btl__ofud_8h_a5162845967469e8adaaf2e51d183a954}

\item 
\hypertarget{btl__ofud_8h_a6a1bb9a8f8061a98a8bc03145756afa9}{\#define {\bfseries M\+C\+A\+\_\+\+B\+T\+L\+\_\+\+U\+D\+\_\+\+S\+H\+O\+W\+\_\+\+T\+I\+M\+E}(var)}\label{btl__ofud_8h_a6a1bb9a8f8061a98a8bc03145756afa9}

\end{DoxyCompactItemize}
\subsection*{Typedefs}
\begin{DoxyCompactItemize}
\item 
\hypertarget{btl__ofud_8h_a1e0e2ffe61634b19411cb827589e5735}{typedef struct \\*
\hyperlink{structmca__btl__ud__component__t}{mca\+\_\+btl\+\_\+ud\+\_\+component\+\_\+t} {\bfseries mca\+\_\+btl\+\_\+ud\+\_\+component\+\_\+t}}\label{btl__ofud_8h_a1e0e2ffe61634b19411cb827589e5735}

\item 
\hypertarget{btl__ofud_8h_aca8faba292bee9a4e8e601007170155b}{typedef \hyperlink{structmca__btl__base__recv__reg__t}{mca\+\_\+btl\+\_\+base\+\_\+recv\+\_\+reg\+\_\+t} {\bfseries mca\+\_\+btl\+\_\+ud\+\_\+recv\+\_\+reg\+\_\+t}}\label{btl__ofud_8h_aca8faba292bee9a4e8e601007170155b}

\item 
\hypertarget{btl__ofud_8h_ab0f8fd6df87b18cdd3248cedce785157}{typedef struct \hyperlink{structmca__btl__ud__module__t}{mca\+\_\+btl\+\_\+ud\+\_\+module\+\_\+t} {\bfseries mca\+\_\+btl\+\_\+ud\+\_\+module\+\_\+t}}\label{btl__ofud_8h_ab0f8fd6df87b18cdd3248cedce785157}

\end{DoxyCompactItemize}
\subsection*{Functions}
\begin{DoxyCompactItemize}
\item 
\hyperlink{structmca__btl__base__module__t}{mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$$\ast$ \hyperlink{btl__ofud_8h_a80668cb7828f1ff1143caf8ec9dbe3d3}{mca\+\_\+btl\+\_\+ud\+\_\+component\+\_\+init} (int $\ast$num\+\_\+btl\+\_\+modules, bool allow\+\_\+multi\+\_\+user\+\_\+threads, bool have\+\_\+hidden\+\_\+threads)
\begin{DoxyCompactList}\small\item\em I\+B component initialization. \end{DoxyCompactList}\item 
\hypertarget{btl__ofud_8h_aa2c42b53bb708e6bb44b74bc8e2d4927}{int \hyperlink{btl__ofud_8h_aa2c42b53bb708e6bb44b74bc8e2d4927}{mca\+\_\+btl\+\_\+ud\+\_\+component\+\_\+progress} (void)}\label{btl__ofud_8h_aa2c42b53bb708e6bb44b74bc8e2d4927}

\begin{DoxyCompactList}\small\item\em U\+D/\+I\+B component progress. \end{DoxyCompactList}\item 
int \hyperlink{btl__ofud_8h_a123a46492b4134c261b502cefdce8b96}{mca\+\_\+btl\+\_\+ud\+\_\+finalize} (struct \hyperlink{structmca__btl__base__module__t}{mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$btl)
\begin{DoxyCompactList}\small\item\em Cleanup any resources held by the B\+T\+L. \end{DoxyCompactList}\item 
int \hyperlink{btl__ofud_8h_a0847fde7a34871a01e45a50b8039c481}{mca\+\_\+btl\+\_\+ud\+\_\+add\+\_\+procs} (struct \hyperlink{structmca__btl__base__module__t}{mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$btl, size\+\_\+t nprocs, struct \hyperlink{structompi__proc__t}{ompi\+\_\+proc\+\_\+t} $\ast$$\ast$procs, struct \hyperlink{structmca__btl__base__endpoint__t}{mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t} $\ast$$\ast$peers, \hyperlink{structopal__bitmap__t}{opal\+\_\+bitmap\+\_\+t} $\ast$reachable)
\begin{DoxyCompactList}\small\item\em P\+M\+L-\/$>$B\+T\+L notification of change in the process list. \end{DoxyCompactList}\item 
int \hyperlink{btl__ofud_8h_a54dec56e5b43997ba7d5c67d9a37f15b}{mca\+\_\+btl\+\_\+ud\+\_\+del\+\_\+procs} (struct \hyperlink{structmca__btl__base__module__t}{mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$btl, size\+\_\+t nprocs, struct \hyperlink{structompi__proc__t}{ompi\+\_\+proc\+\_\+t} $\ast$$\ast$procs, struct \hyperlink{structmca__btl__base__endpoint__t}{mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t} $\ast$$\ast$peers)
\begin{DoxyCompactList}\small\item\em P\+M\+L-\/$>$B\+T\+L notification of change in the process list. \end{DoxyCompactList}\item 
int \hyperlink{btl__ofud_8h_a2d20a77ef84caec21bdfdf5f65a329a8}{mca\+\_\+btl\+\_\+ud\+\_\+send} (struct \hyperlink{structmca__btl__base__module__t}{mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$btl, struct \hyperlink{structmca__btl__base__endpoint__t}{mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t} $\ast$btl\+\_\+peer, struct \hyperlink{structmca__btl__base__descriptor__t}{mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t} $\ast$descriptor, mca\+\_\+btl\+\_\+base\+\_\+tag\+\_\+t tag)
\begin{DoxyCompactList}\small\item\em P\+M\+L-\/$>$B\+T\+L Initiate a send of the specified size. \end{DoxyCompactList}\item 
\hyperlink{structmca__btl__base__descriptor__t}{mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t} $\ast$ \hyperlink{btl__ofud_8h_a5cabeb3930d8cf6bc31c5410efdb168c}{mca\+\_\+btl\+\_\+ud\+\_\+alloc} (struct \hyperlink{structmca__btl__base__module__t}{mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$btl, struct \hyperlink{structmca__btl__base__endpoint__t}{mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t} $\ast$endpoint, uint8\+\_\+t order, size\+\_\+t size, uint32\+\_\+t flags)
\begin{DoxyCompactList}\small\item\em Allocate a descriptor. \end{DoxyCompactList}\item 
int \hyperlink{btl__ofud_8h_ab03785a94248585cdf56b9fd844a5eac}{mca\+\_\+btl\+\_\+ud\+\_\+free} (struct \hyperlink{structmca__btl__base__module__t}{mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$btl, \hyperlink{structmca__btl__base__descriptor__t}{mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t} $\ast$des)
\begin{DoxyCompactList}\small\item\em Return a segment allocated by this B\+T\+L. \end{DoxyCompactList}\item 
\hyperlink{structmca__btl__base__descriptor__t}{mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t} $\ast$ \hyperlink{btl__ofud_8h_a52b78314a5c471103b9bb01b9f00d806}{mca\+\_\+btl\+\_\+ud\+\_\+prepare\+\_\+src} (struct \hyperlink{structmca__btl__base__module__t}{mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$btl, struct \hyperlink{structmca__btl__base__endpoint__t}{mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t} $\ast$peer, \hyperlink{structmca__mpool__base__registration__t}{mca\+\_\+mpool\+\_\+base\+\_\+registration\+\_\+t} $\ast$registration, struct \hyperlink{structopal__convertor__t}{opal\+\_\+convertor\+\_\+t} $\ast$convertor, uint8\+\_\+t order, size\+\_\+t reserve, size\+\_\+t $\ast$size, uint32\+\_\+t flags)
\begin{DoxyCompactList}\small\item\em Pack data and return a descriptor that can be used for send/put. \end{DoxyCompactList}\item 
\hypertarget{btl__ofud_8h_a36d56556154be8ab7f2394e39340fe84}{int {\bfseries mca\+\_\+btl\+\_\+ud\+\_\+module\+\_\+init} (\hyperlink{structmca__btl__ud__module__t}{mca\+\_\+btl\+\_\+ud\+\_\+module\+\_\+t} $\ast$ud\+\_\+btl)}\label{btl__ofud_8h_a36d56556154be8ab7f2394e39340fe84}

\item 
int \hyperlink{btl__ofud_8h_a28cdb7da0e7a8649b9c2c62cdf179a03}{mca\+\_\+btl\+\_\+ud\+\_\+ft\+\_\+event} (int state)
\begin{DoxyCompactList}\small\item\em Fault Tolerance Event Notification \hyperlink{structFunction}{Function}. \end{DoxyCompactList}\end{DoxyCompactItemize}
\subsection*{Variables}
\begin{DoxyCompactItemize}
\item 
\hypertarget{btl__ofud_8h_a23aa70c6689743c08efed8c8a3bfa74e}{O\+M\+P\+I\+\_\+\+M\+O\+D\+U\+L\+E\+\_\+\+D\+E\+C\+L\+S\+P\+E\+C \\*
\hyperlink{structmca__btl__ud__component__t}{mca\+\_\+btl\+\_\+ud\+\_\+component\+\_\+t} {\bfseries mca\+\_\+btl\+\_\+ofud\+\_\+component}}\label{btl__ofud_8h_a23aa70c6689743c08efed8c8a3bfa74e}

\item 
\hypertarget{btl__ofud_8h_ac41a01ffc9a51dcb4226afb49d74d5c2}{\hyperlink{structmca__btl__ud__module__t}{mca\+\_\+btl\+\_\+ud\+\_\+module\+\_\+t} {\bfseries mca\+\_\+btl\+\_\+ofud\+\_\+module}}\label{btl__ofud_8h_ac41a01ffc9a51dcb4226afb49d74d5c2}

\end{DoxyCompactItemize}


\subsection{Function Documentation}
\hypertarget{btl__ofud_8h_a0847fde7a34871a01e45a50b8039c481}{\index{btl\+\_\+ofud.\+h@{btl\+\_\+ofud.\+h}!mca\+\_\+btl\+\_\+ud\+\_\+add\+\_\+procs@{mca\+\_\+btl\+\_\+ud\+\_\+add\+\_\+procs}}
\index{mca\+\_\+btl\+\_\+ud\+\_\+add\+\_\+procs@{mca\+\_\+btl\+\_\+ud\+\_\+add\+\_\+procs}!btl\+\_\+ofud.\+h@{btl\+\_\+ofud.\+h}}
\subsubsection[{mca\+\_\+btl\+\_\+ud\+\_\+add\+\_\+procs}]{\setlength{\rightskip}{0pt plus 5cm}int mca\+\_\+btl\+\_\+ud\+\_\+add\+\_\+procs (
\begin{DoxyParamCaption}
\item[{struct {\bf mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$}]{btl, }
\item[{size\+\_\+t}]{nprocs, }
\item[{struct {\bf ompi\+\_\+proc\+\_\+t} $\ast$$\ast$}]{procs, }
\item[{struct {\bf mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t} $\ast$$\ast$}]{peers, }
\item[{{\bf opal\+\_\+bitmap\+\_\+t} $\ast$}]{reachable}
\end{DoxyParamCaption}
)}}\label{btl__ofud_8h_a0847fde7a34871a01e45a50b8039c481}


P\+M\+L-\/$>$B\+T\+L notification of change in the process list. 


\begin{DoxyParams}{Parameters}
{\em btl} & (I\+N) \\
\hline
{\em nprocs} & (I\+N) Number of processes \\
\hline
{\em procs} & (I\+N) Set of processes \\
\hline
{\em peers} & (O\+U\+T) Set of (optional) peer addressing info. \\
\hline
{\em peers} & (I\+N/\+O\+U\+T) Set of processes that are reachable via this B\+T\+L. \\
\hline
\end{DoxyParams}
\begin{DoxyReturn}{Returns}
O\+M\+P\+I\+\_\+\+S\+U\+C\+C\+E\+S\+S or error status on failure. 
\end{DoxyReturn}


References O\+B\+J\+\_\+\+C\+O\+N\+S\+T\+R\+U\+C\+T, O\+B\+J\+\_\+\+R\+E\+L\+E\+A\+S\+E, opal\+\_\+bitmap\+\_\+set\+\_\+bit(), opal\+\_\+hash\+\_\+table\+\_\+init(), opal\+\_\+hash\+\_\+table\+\_\+set\+\_\+value\+\_\+uint64(), O\+P\+A\+L\+\_\+\+T\+H\+R\+E\+A\+D\+\_\+\+L\+O\+C\+K, O\+P\+A\+L\+\_\+\+T\+H\+R\+E\+A\+D\+\_\+\+U\+N\+L\+O\+C\+K, mca\+\_\+btl\+\_\+ud\+\_\+proc\+\_\+t\+::proc\+\_\+lock, mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t\+::rem\+\_\+addr, and mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t\+::rmt\+\_\+ah.

\hypertarget{btl__ofud_8h_a5cabeb3930d8cf6bc31c5410efdb168c}{\index{btl\+\_\+ofud.\+h@{btl\+\_\+ofud.\+h}!mca\+\_\+btl\+\_\+ud\+\_\+alloc@{mca\+\_\+btl\+\_\+ud\+\_\+alloc}}
\index{mca\+\_\+btl\+\_\+ud\+\_\+alloc@{mca\+\_\+btl\+\_\+ud\+\_\+alloc}!btl\+\_\+ofud.\+h@{btl\+\_\+ofud.\+h}}
\subsubsection[{mca\+\_\+btl\+\_\+ud\+\_\+alloc}]{\setlength{\rightskip}{0pt plus 5cm}{\bf mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t}$\ast$ mca\+\_\+btl\+\_\+ud\+\_\+alloc (
\begin{DoxyParamCaption}
\item[{struct {\bf mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$}]{btl, }
\item[{struct {\bf mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t} $\ast$}]{endpoint, }
\item[{uint8\+\_\+t}]{order, }
\item[{size\+\_\+t}]{size, }
\item[{uint32\+\_\+t}]{flags}
\end{DoxyParamCaption}
)}}\label{btl__ofud_8h_a5cabeb3930d8cf6bc31c5410efdb168c}


Allocate a descriptor. 


\begin{DoxyParams}{Parameters}
{\em btl} & (I\+N) B\+T\+L module \\
\hline
{\em size} & (I\+N) Requested descriptor size.\\
\hline
\end{DoxyParams}
Allocate a descriptor.


\begin{DoxyParams}{Parameters}
{\em btl} & (I\+N) B\+T\+L module \\
\hline
{\em size} & (I\+N) \hyperlink{classRequest}{Request} segment size.\\
\hline
\end{DoxyParams}
When allocating a segment we pull a pre-\/alllocated segment from one of two free lists, an eager list and a max list 

References mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t\+::btl\+\_\+eager\+\_\+limit, mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t\+::des\+\_\+flags, mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t\+::order, and mca\+\_\+btl\+\_\+base\+\_\+segment\+\_\+t\+::seg\+\_\+len.

\hypertarget{btl__ofud_8h_a80668cb7828f1ff1143caf8ec9dbe3d3}{\index{btl\+\_\+ofud.\+h@{btl\+\_\+ofud.\+h}!mca\+\_\+btl\+\_\+ud\+\_\+component\+\_\+init@{mca\+\_\+btl\+\_\+ud\+\_\+component\+\_\+init}}
\index{mca\+\_\+btl\+\_\+ud\+\_\+component\+\_\+init@{mca\+\_\+btl\+\_\+ud\+\_\+component\+\_\+init}!btl\+\_\+ofud.\+h@{btl\+\_\+ofud.\+h}}
\subsubsection[{mca\+\_\+btl\+\_\+ud\+\_\+component\+\_\+init}]{\setlength{\rightskip}{0pt plus 5cm}{\bf mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t}$\ast$$\ast$ mca\+\_\+btl\+\_\+ud\+\_\+component\+\_\+init (
\begin{DoxyParamCaption}
\item[{int $\ast$}]{num\+\_\+btl\+\_\+modules, }
\item[{bool}]{allow\+\_\+multi\+\_\+user\+\_\+threads, }
\item[{bool}]{have\+\_\+hidden\+\_\+threads}
\end{DoxyParamCaption}
)}}\label{btl__ofud_8h_a80668cb7828f1ff1143caf8ec9dbe3d3}


I\+B component initialization. 


\begin{DoxyParams}{Parameters}
{\em num\+\_\+btl\+\_\+modules} & (O\+U\+T) Number of B\+T\+Ls returned in B\+T\+L array. \\
\hline
{\em allow\+\_\+multi\+\_\+user\+\_\+threads} & (O\+U\+T) Flag indicating wether B\+T\+L supports user threads (T\+R\+U\+E) \\
\hline
{\em have\+\_\+hidden\+\_\+threads} & (O\+U\+T) Flag indicating whether B\+T\+L uses threads (T\+R\+U\+E)\\
\hline
\end{DoxyParams}
(1) read interface list from verbs and compare against component parameters then create a B\+T\+L instance for selected interfaces (2) publish B\+T\+L addressing info We must loop through all the hca id's, get their handles and for each hca we query the number of ports on the hca and set up a distinct btl module for each hca port 

References mca\+\_\+btl\+\_\+ud\+\_\+module\+\_\+t\+::addr, mca\+\_\+btl\+\_\+ud\+\_\+component\+\_\+t\+::max\+\_\+btls, mca\+\_\+base\+\_\+param\+\_\+find(), mca\+\_\+base\+\_\+param\+\_\+lookup\+\_\+string(), mca\+\_\+btl\+\_\+ud\+\_\+component\+\_\+t\+::num\+\_\+btls, O\+B\+J\+\_\+\+C\+O\+N\+S\+T\+R\+U\+C\+T, O\+B\+J\+\_\+\+D\+E\+S\+T\+R\+U\+C\+T, ompi\+\_\+mpi\+\_\+thread\+\_\+multiple, opal\+\_\+argv\+\_\+copy(), opal\+\_\+argv\+\_\+free(), opal\+\_\+argv\+\_\+split(), opal\+\_\+list\+\_\+append, opal\+\_\+list\+\_\+remove\+\_\+first(), O\+R\+T\+E\+\_\+\+P\+R\+O\+C\+\_\+\+M\+Y\+\_\+\+N\+A\+M\+E, orte\+\_\+show\+\_\+help(), and mca\+\_\+btl\+\_\+ud\+\_\+component\+\_\+t\+::ud\+\_\+btls.

\hypertarget{btl__ofud_8h_a54dec56e5b43997ba7d5c67d9a37f15b}{\index{btl\+\_\+ofud.\+h@{btl\+\_\+ofud.\+h}!mca\+\_\+btl\+\_\+ud\+\_\+del\+\_\+procs@{mca\+\_\+btl\+\_\+ud\+\_\+del\+\_\+procs}}
\index{mca\+\_\+btl\+\_\+ud\+\_\+del\+\_\+procs@{mca\+\_\+btl\+\_\+ud\+\_\+del\+\_\+procs}!btl\+\_\+ofud.\+h@{btl\+\_\+ofud.\+h}}
\subsubsection[{mca\+\_\+btl\+\_\+ud\+\_\+del\+\_\+procs}]{\setlength{\rightskip}{0pt plus 5cm}int mca\+\_\+btl\+\_\+ud\+\_\+del\+\_\+procs (
\begin{DoxyParamCaption}
\item[{struct {\bf mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$}]{btl, }
\item[{size\+\_\+t}]{nprocs, }
\item[{struct {\bf ompi\+\_\+proc\+\_\+t} $\ast$$\ast$}]{procs, }
\item[{struct {\bf mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t} $\ast$$\ast$}]{peers}
\end{DoxyParamCaption}
)}}\label{btl__ofud_8h_a54dec56e5b43997ba7d5c67d9a37f15b}


P\+M\+L-\/$>$B\+T\+L notification of change in the process list. 


\begin{DoxyParams}{Parameters}
{\em btl} & (I\+N) B\+T\+L instance \\
\hline
{\em nproc} & (I\+N) Number of processes. \\
\hline
{\em procs} & (I\+N) Set of processes. \\
\hline
{\em peers} & (I\+N) Set of peer data structures. \\
\hline
\end{DoxyParams}
\begin{DoxyReturn}{Returns}
\hyperlink{classStatus}{Status} indicating if cleanup was successful 
\end{DoxyReturn}


References O\+B\+J\+\_\+\+R\+E\+L\+E\+A\+S\+E, opal\+\_\+hash\+\_\+table\+\_\+remove\+\_\+value\+\_\+uint64(), and mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t\+::rem\+\_\+addr.

\hypertarget{btl__ofud_8h_a123a46492b4134c261b502cefdce8b96}{\index{btl\+\_\+ofud.\+h@{btl\+\_\+ofud.\+h}!mca\+\_\+btl\+\_\+ud\+\_\+finalize@{mca\+\_\+btl\+\_\+ud\+\_\+finalize}}
\index{mca\+\_\+btl\+\_\+ud\+\_\+finalize@{mca\+\_\+btl\+\_\+ud\+\_\+finalize}!btl\+\_\+ofud.\+h@{btl\+\_\+ofud.\+h}}
\subsubsection[{mca\+\_\+btl\+\_\+ud\+\_\+finalize}]{\setlength{\rightskip}{0pt plus 5cm}int mca\+\_\+btl\+\_\+ud\+\_\+finalize (
\begin{DoxyParamCaption}
\item[{struct {\bf mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$}]{btl}
\end{DoxyParamCaption}
)}}\label{btl__ofud_8h_a123a46492b4134c261b502cefdce8b96}


Cleanup any resources held by the B\+T\+L. 


\begin{DoxyParams}{Parameters}
{\em btl} & B\+T\+L instance. \\
\hline
\end{DoxyParams}
\begin{DoxyReturn}{Returns}
O\+M\+P\+I\+\_\+\+S\+U\+C\+C\+E\+S\+S or error status on failure. 
\end{DoxyReturn}


References mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t\+::btl\+\_\+mpool, mca\+\_\+btl\+\_\+ud\+\_\+module\+\_\+t\+::ib\+\_\+qp, O\+B\+J\+\_\+\+D\+E\+S\+T\+R\+U\+C\+T, mca\+\_\+btl\+\_\+ud\+\_\+module\+\_\+t\+::pending\+\_\+frags, mca\+\_\+btl\+\_\+ud\+\_\+module\+\_\+t\+::recv\+\_\+frags, mca\+\_\+btl\+\_\+ud\+\_\+module\+\_\+t\+::send\+\_\+frags, mca\+\_\+btl\+\_\+ud\+\_\+module\+\_\+t\+::ud\+\_\+lock, and mca\+\_\+btl\+\_\+ud\+\_\+module\+\_\+t\+::user\+\_\+frags.

\hypertarget{btl__ofud_8h_ab03785a94248585cdf56b9fd844a5eac}{\index{btl\+\_\+ofud.\+h@{btl\+\_\+ofud.\+h}!mca\+\_\+btl\+\_\+ud\+\_\+free@{mca\+\_\+btl\+\_\+ud\+\_\+free}}
\index{mca\+\_\+btl\+\_\+ud\+\_\+free@{mca\+\_\+btl\+\_\+ud\+\_\+free}!btl\+\_\+ofud.\+h@{btl\+\_\+ofud.\+h}}
\subsubsection[{mca\+\_\+btl\+\_\+ud\+\_\+free}]{\setlength{\rightskip}{0pt plus 5cm}int mca\+\_\+btl\+\_\+ud\+\_\+free (
\begin{DoxyParamCaption}
\item[{struct {\bf mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$}]{btl, }
\item[{{\bf mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t} $\ast$}]{des}
\end{DoxyParamCaption}
)}}\label{btl__ofud_8h_ab03785a94248585cdf56b9fd844a5eac}


Return a segment allocated by this B\+T\+L. 


\begin{DoxyParams}{Parameters}
{\em btl} & (I\+N) B\+T\+L module \\
\hline
{\em descriptor} & (I\+N) Allocated descriptor.\\
\hline
\end{DoxyParams}
Return a segment allocated by this B\+T\+L.

Return the segment to the appropriate preallocated segment list 

References mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t\+::btl\+\_\+mpool, and mca\+\_\+mpool\+\_\+base\+\_\+module\+\_\+t\+::mpool\+\_\+deregister.



Referenced by mca\+\_\+btl\+\_\+ud\+\_\+component\+\_\+progress().

\hypertarget{btl__ofud_8h_a28cdb7da0e7a8649b9c2c62cdf179a03}{\index{btl\+\_\+ofud.\+h@{btl\+\_\+ofud.\+h}!mca\+\_\+btl\+\_\+ud\+\_\+ft\+\_\+event@{mca\+\_\+btl\+\_\+ud\+\_\+ft\+\_\+event}}
\index{mca\+\_\+btl\+\_\+ud\+\_\+ft\+\_\+event@{mca\+\_\+btl\+\_\+ud\+\_\+ft\+\_\+event}!btl\+\_\+ofud.\+h@{btl\+\_\+ofud.\+h}}
\subsubsection[{mca\+\_\+btl\+\_\+ud\+\_\+ft\+\_\+event}]{\setlength{\rightskip}{0pt plus 5cm}int mca\+\_\+btl\+\_\+ud\+\_\+ft\+\_\+event (
\begin{DoxyParamCaption}
\item[{int}]{state}
\end{DoxyParamCaption}
)}}\label{btl__ofud_8h_a28cdb7da0e7a8649b9c2c62cdf179a03}


Fault Tolerance Event Notification \hyperlink{structFunction}{Function}. 


\begin{DoxyParams}{Parameters}
{\em state} & Checkpoint \hyperlink{classState}{State} \\
\hline
\end{DoxyParams}
\begin{DoxyReturn}{Returns}
O\+M\+P\+I\+\_\+\+S\+U\+C\+C\+E\+S\+S or failure status 
\end{DoxyReturn}
\hypertarget{btl__ofud_8h_a52b78314a5c471103b9bb01b9f00d806}{\index{btl\+\_\+ofud.\+h@{btl\+\_\+ofud.\+h}!mca\+\_\+btl\+\_\+ud\+\_\+prepare\+\_\+src@{mca\+\_\+btl\+\_\+ud\+\_\+prepare\+\_\+src}}
\index{mca\+\_\+btl\+\_\+ud\+\_\+prepare\+\_\+src@{mca\+\_\+btl\+\_\+ud\+\_\+prepare\+\_\+src}!btl\+\_\+ofud.\+h@{btl\+\_\+ofud.\+h}}
\subsubsection[{mca\+\_\+btl\+\_\+ud\+\_\+prepare\+\_\+src}]{\setlength{\rightskip}{0pt plus 5cm}{\bf mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t}$\ast$ mca\+\_\+btl\+\_\+ud\+\_\+prepare\+\_\+src (
\begin{DoxyParamCaption}
\item[{struct {\bf mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$}]{btl, }
\item[{struct {\bf mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t} $\ast$}]{endpoint, }
\item[{{\bf mca\+\_\+mpool\+\_\+base\+\_\+registration\+\_\+t} $\ast$}]{registration, }
\item[{struct {\bf opal\+\_\+convertor\+\_\+t} $\ast$}]{convertor, }
\item[{uint8\+\_\+t}]{order, }
\item[{size\+\_\+t}]{reserve, }
\item[{size\+\_\+t $\ast$}]{size, }
\item[{uint32\+\_\+t}]{flags}
\end{DoxyParamCaption}
)}}\label{btl__ofud_8h_a52b78314a5c471103b9bb01b9f00d806}


Pack data and return a descriptor that can be used for send/put. 


\begin{DoxyParams}{Parameters}
{\em btl} & (I\+N) B\+T\+L module \\
\hline
{\em peer} & (I\+N) B\+T\+L peer addressing\\
\hline
\end{DoxyParams}
Pack data and return a descriptor that can be used for send/put.


\begin{DoxyParams}{Parameters}
{\em btl} & (I\+N) B\+T\+L module \\
\hline
{\em peer} & (I\+N) B\+T\+L peer addressing\\
\hline
\end{DoxyParams}
prepare source's behavior depends on the following\+: Has a valid memory registration been passed to prepare\+\_\+src? if so we attempt to use the pre-\/registred user-\/buffer, if the memory registration is to small (only a portion of the user buffer) then we must reregister the user buffer Has the user requested the memory to be left pinned? if so we insert the memory registration into a memory tree for later lookup, we may also remove a previous registration if a M\+R\+U (most recently used) list of registions is full, this prevents resources from being exhausted. Is the requested size larger than the btl's max send size? if so and we aren't asked to leave the registration pinned then we register the memory if the user's buffer is contiguous. Otherwise we choose from two free lists of pre-\/registered memory in which to pack the data into. 

References mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t\+::btl\+\_\+eager\+\_\+limit, mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t\+::btl\+\_\+max\+\_\+send\+\_\+size, mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t\+::btl\+\_\+mpool, mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t\+::des\+\_\+dst, mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t\+::des\+\_\+dst\+\_\+cnt, mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t\+::des\+\_\+flags, mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t\+::des\+\_\+src, mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t\+::des\+\_\+src\+\_\+cnt, mca\+\_\+mpool\+\_\+base\+\_\+module\+\_\+t\+::mpool\+\_\+register, mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t\+::order, mca\+\_\+btl\+\_\+base\+\_\+segment\+\_\+t\+::seg\+\_\+addr, and mca\+\_\+btl\+\_\+base\+\_\+segment\+\_\+t\+::seg\+\_\+len.

\hypertarget{btl__ofud_8h_a2d20a77ef84caec21bdfdf5f65a329a8}{\index{btl\+\_\+ofud.\+h@{btl\+\_\+ofud.\+h}!mca\+\_\+btl\+\_\+ud\+\_\+send@{mca\+\_\+btl\+\_\+ud\+\_\+send}}
\index{mca\+\_\+btl\+\_\+ud\+\_\+send@{mca\+\_\+btl\+\_\+ud\+\_\+send}!btl\+\_\+ofud.\+h@{btl\+\_\+ofud.\+h}}
\subsubsection[{mca\+\_\+btl\+\_\+ud\+\_\+send}]{\setlength{\rightskip}{0pt plus 5cm}int mca\+\_\+btl\+\_\+ud\+\_\+send (
\begin{DoxyParamCaption}
\item[{struct {\bf mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$}]{btl, }
\item[{struct {\bf mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t} $\ast$}]{btl\+\_\+peer, }
\item[{struct {\bf mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t} $\ast$}]{descriptor, }
\item[{mca\+\_\+btl\+\_\+base\+\_\+tag\+\_\+t}]{tag}
\end{DoxyParamCaption}
)}}\label{btl__ofud_8h_a2d20a77ef84caec21bdfdf5f65a329a8}


P\+M\+L-\/$>$B\+T\+L Initiate a send of the specified size. 


\begin{DoxyParams}{Parameters}
{\em btl} & (I\+N) B\+T\+L instance \\
\hline
{\em btl\+\_\+base\+\_\+peer} & (I\+N) B\+T\+L peer addressing \\
\hline
{\em send\+\_\+request} & (I\+N/\+O\+U\+T) \hyperlink{structSend}{Send} request (allocated by P\+M\+L via mca\+\_\+btl\+\_\+base\+\_\+request\+\_\+alloc\+\_\+fn\+\_\+t) \\
\hline
{\em size} & (I\+N) Number of bytes P\+M\+L is requesting B\+T\+L to deliver \\
\hline
{\em flags} & (I\+N) Flags that should be passed to the peer via the message header. \\
\hline
{\em request} & (O\+U\+T) O\+M\+P\+I\+\_\+\+S\+U\+C\+C\+E\+S\+S if the B\+T\+L was able to queue one or more fragments \\
\hline
\end{DoxyParams}
