\hypertarget{btl__udapl_8h}{\section{ompi/mca/btl/udapl/btl\+\_\+udapl.h File Reference}
\label{btl__udapl_8h}\index{ompi/mca/btl/udapl/btl\+\_\+udapl.\+h@{ompi/mca/btl/udapl/btl\+\_\+udapl.\+h}}
}
{\ttfamily \#include \char`\"{}ompi\+\_\+config.\+h\char`\"{}}\\*
{\ttfamily \#include $<$sys/types.\+h$>$}\\*
{\ttfamily \#include $<$string.\+h$>$}\\*
{\ttfamily \#include $<$dat/udat.\+h$>$}\\*
{\ttfamily \#include \char`\"{}opal/class/opal\+\_\+pointer\+\_\+array.\+h\char`\"{}}\\*
{\ttfamily \#include \char`\"{}opal/mca/event/event.\+h\char`\"{}}\\*
{\ttfamily \#include \char`\"{}ompi/class/ompi\+\_\+free\+\_\+list.\+h\char`\"{}}\\*
{\ttfamily \#include \char`\"{}ompi/mca/btl/btl.\+h\char`\"{}}\\*
{\ttfamily \#include \char`\"{}ompi/mca/btl/base/base.\+h\char`\"{}}\\*
{\ttfamily \#include \char`\"{}ompi/mca/btl/base/btl\+\_\+base\+\_\+error.\+h\char`\"{}}\\*
{\ttfamily \#include \char`\"{}orte/util/show\+\_\+help.\+h\char`\"{}}\\*
{\ttfamily \#include \char`\"{}ompi/mca/mpool/mpool.\+h\char`\"{}}\\*
{\ttfamily \#include \char`\"{}btl\+\_\+udapl\+\_\+endpoint.\+h\char`\"{}}\\*
\subsection*{Data Structures}
\begin{DoxyCompactItemize}
\item 
struct \hyperlink{structmca__btl__udapl__component__t}{mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+t}
\begin{DoxyCompactList}\small\item\em u\+D\+A\+P\+L B\+T\+L component. \end{DoxyCompactList}\item 
struct \hyperlink{structmca__btl__udapl__module__t}{mca\+\_\+btl\+\_\+udapl\+\_\+module\+\_\+t}
\begin{DoxyCompactList}\small\item\em B\+T\+L Module Interface. \end{DoxyCompactList}\item 
struct \hyperlink{structmca__btl__udapl__reg__t}{mca\+\_\+btl\+\_\+udapl\+\_\+reg\+\_\+t}
\end{DoxyCompactItemize}
\subsection*{Macros}
\begin{DoxyCompactItemize}
\item 
\#define \hyperlink{btl__udapl_8h_a056f4c80c859afd0c5ff86a4ff83d0cc}{V\+E\+R\+B\+O\+S\+E\+\_\+\+C\+R\+I\+T\+I\+C\+A\+L}~0
\begin{DoxyCompactList}\small\item\em Report Out from u\+D\+A\+P\+L B\+T\+L. \end{DoxyCompactList}\item 
\hypertarget{btl__udapl_8h_a1511e3bccb4acd6e77b31682ebae0f11}{\#define {\bfseries V\+E\+R\+B\+O\+S\+E\+\_\+\+S\+H\+O\+W\+\_\+\+H\+E\+L\+P}~10}\label{btl__udapl_8h_a1511e3bccb4acd6e77b31682ebae0f11}

\item 
\hypertarget{btl__udapl_8h_aebb1bdf14560925143d7dbde19a7bf29}{\#define {\bfseries V\+E\+R\+B\+O\+S\+E\+\_\+\+I\+N\+F\+O\+R\+M}~20}\label{btl__udapl_8h_aebb1bdf14560925143d7dbde19a7bf29}

\item 
\hypertarget{btl__udapl_8h_a1a9cc87afd2017c33a7838e67523c233}{\#define {\bfseries V\+E\+R\+B\+O\+S\+E\+\_\+\+D\+I\+A\+G\+N\+O\+S\+E}~30}\label{btl__udapl_8h_a1a9cc87afd2017c33a7838e67523c233}

\item 
\hypertarget{btl__udapl_8h_ae7a94e60c789f9bc2d06e82de490cdff}{\#define {\bfseries V\+E\+R\+B\+O\+S\+E\+\_\+\+D\+E\+V\+E\+L\+O\+P\+E\+R}~90}\label{btl__udapl_8h_ae7a94e60c789f9bc2d06e82de490cdff}

\item 
\#define {\bfseries B\+T\+L\+\_\+\+U\+D\+A\+P\+L\+\_\+\+V\+E\+R\+B\+O\+S\+E\+\_\+\+O\+U\+T\+P\+U\+T}(verbose\+\_\+level, args)
\item 
\#define {\bfseries B\+T\+L\+\_\+\+U\+D\+A\+P\+L\+\_\+\+V\+E\+R\+B\+O\+S\+E\+\_\+\+H\+E\+L\+P}(verbose\+\_\+level, args)
\item 
\hypertarget{btl__udapl_8h_ab49abf6fa7e5d8a2a229a9b48d231d97}{\#define {\bfseries M\+C\+A\+\_\+\+B\+T\+L\+\_\+\+U\+D\+A\+P\+L\+\_\+\+E\+R\+R\+O\+R}(ret, str)}\label{btl__udapl_8h_ab49abf6fa7e5d8a2a229a9b48d231d97}

\end{DoxyCompactItemize}
\subsection*{Typedefs}
\begin{DoxyCompactItemize}
\item 
\hypertarget{btl__udapl_8h_a95f5ef36a58f505c0822ee1d5e10d2ce}{typedef struct \\*
\hyperlink{structmca__btl__udapl__component__t}{mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+t} {\bfseries mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+t}}\label{btl__udapl_8h_a95f5ef36a58f505c0822ee1d5e10d2ce}

\item 
\hypertarget{btl__udapl_8h_aa892a953dcc6f262dc15417e31df2335}{typedef struct \\*
\hyperlink{structmca__btl__udapl__module__t}{mca\+\_\+btl\+\_\+udapl\+\_\+module\+\_\+t} {\bfseries mca\+\_\+btl\+\_\+udapl\+\_\+module\+\_\+t}}\label{btl__udapl_8h_aa892a953dcc6f262dc15417e31df2335}

\item 
\hypertarget{btl__udapl_8h_af8d14fd65ef7c7818ef6a36be228f66f}{typedef struct \hyperlink{structmca__btl__udapl__reg__t}{mca\+\_\+btl\+\_\+udapl\+\_\+reg\+\_\+t} {\bfseries mca\+\_\+btl\+\_\+udapl\+\_\+reg\+\_\+t}}\label{btl__udapl_8h_af8d14fd65ef7c7818ef6a36be228f66f}

\end{DoxyCompactItemize}
\subsection*{Functions}
\begin{DoxyCompactItemize}
\item 
int \hyperlink{btl__udapl_8h_a2ffd5e9c4c92984bc10efe74500546f6}{mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+open} (void)
\begin{DoxyCompactList}\small\item\em Register u\+D\+A\+P\+L component parameters with the M\+C\+A framework. \end{DoxyCompactList}\item 
\hypertarget{btl__udapl_8h_a6ec76d509aa24eb52bf5415a178a2d2f}{int \hyperlink{btl__udapl_8h_a6ec76d509aa24eb52bf5415a178a2d2f}{mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+close} (void)}\label{btl__udapl_8h_a6ec76d509aa24eb52bf5415a178a2d2f}

\begin{DoxyCompactList}\small\item\em Any final cleanup before being unloaded. \end{DoxyCompactList}\item 
\hyperlink{structmca__btl__base__module__t}{mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$$\ast$ \hyperlink{btl__udapl_8h_ab726542c484f7f794ce99f64e4fdd7db}{mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+init} (int $\ast$num\+\_\+btl\+\_\+modules, bool allow\+\_\+multi\+\_\+user\+\_\+threads, bool have\+\_\+hidden\+\_\+threads)
\begin{DoxyCompactList}\small\item\em u\+D\+A\+P\+L component initialization. \end{DoxyCompactList}\item 
\hypertarget{btl__udapl_8h_ae533e7614ab458a63b55f207afb67798}{int \hyperlink{btl__udapl_8h_ae533e7614ab458a63b55f207afb67798}{mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+progress} (void)}\label{btl__udapl_8h_ae533e7614ab458a63b55f207afb67798}

\begin{DoxyCompactList}\small\item\em u\+D\+A\+P\+L component progress. \end{DoxyCompactList}\item 
int \hyperlink{btl__udapl_8h_a0cbdab4a33fcc4466a7bbaff1e079ff7}{mca\+\_\+btl\+\_\+udapl\+\_\+init} (D\+A\+T\+\_\+\+N\+A\+M\+E\+\_\+\+P\+T\+R ia\+\_\+name, struct \hyperlink{structmca__btl__udapl__module__t}{mca\+\_\+btl\+\_\+udapl\+\_\+module\+\_\+t} $\ast$btl)
\begin{DoxyCompactList}\small\item\em Initialize resources for a new B\+T\+L/u\+D\+A\+P\+L I\+A. \end{DoxyCompactList}\item 
int \hyperlink{btl__udapl_8h_a786694cc6d0ee3cfc9150c5f8ec2df51}{mca\+\_\+btl\+\_\+udapl\+\_\+finalize} (struct \hyperlink{structmca__btl__base__module__t}{mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$btl)
\begin{DoxyCompactList}\small\item\em Cleanup any resources held by the B\+T\+L. \end{DoxyCompactList}\item 
int \hyperlink{btl__udapl_8h_a083ea2359658fbe34dd43ea05eacc9c0}{mca\+\_\+btl\+\_\+udapl\+\_\+add\+\_\+procs} (struct \hyperlink{structmca__btl__base__module__t}{mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$btl, size\+\_\+t nprocs, struct \hyperlink{structompi__proc__t}{ompi\+\_\+proc\+\_\+t} $\ast$$\ast$procs, struct \hyperlink{structmca__btl__base__endpoint__t}{mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t} $\ast$$\ast$peers, \hyperlink{structopal__bitmap__t}{opal\+\_\+bitmap\+\_\+t} $\ast$reachable)
\begin{DoxyCompactList}\small\item\em P\+M\+L-\/$>$B\+T\+L notification of change in the process list. \end{DoxyCompactList}\item 
int \hyperlink{btl__udapl_8h_a2a9bdcf8060523f8610ae1828877f781}{mca\+\_\+btl\+\_\+udapl\+\_\+del\+\_\+procs} (struct \hyperlink{structmca__btl__base__module__t}{mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$btl, size\+\_\+t nprocs, struct \hyperlink{structompi__proc__t}{ompi\+\_\+proc\+\_\+t} $\ast$$\ast$procs, struct \hyperlink{structmca__btl__base__endpoint__t}{mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t} $\ast$$\ast$peers)
\begin{DoxyCompactList}\small\item\em P\+M\+L-\/$>$B\+T\+L notification of change in the process list. \end{DoxyCompactList}\item 
int \hyperlink{btl__udapl_8h_af4fb9b42f540f6fac7eb6f6d11a11a4f}{mca\+\_\+btl\+\_\+udapl\+\_\+send} (struct \hyperlink{structmca__btl__base__module__t}{mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$btl, struct \hyperlink{structmca__btl__base__endpoint__t}{mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t} $\ast$btl\+\_\+peer, struct \hyperlink{structmca__btl__base__descriptor__t}{mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t} $\ast$descriptor, mca\+\_\+btl\+\_\+base\+\_\+tag\+\_\+t tag)
\begin{DoxyCompactList}\small\item\em Initiate an asynchronous send. \end{DoxyCompactList}\item 
int \hyperlink{btl__udapl_8h_ade83967d07957aca9417a42aaed24752}{mca\+\_\+btl\+\_\+udapl\+\_\+put} (struct \hyperlink{structmca__btl__base__module__t}{mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$btl, struct \hyperlink{structmca__btl__base__endpoint__t}{mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t} $\ast$btl\+\_\+peer, struct \hyperlink{structmca__btl__base__descriptor__t}{mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t} $\ast$decriptor)
\begin{DoxyCompactList}\small\item\em Initiate an asynchronous put. \end{DoxyCompactList}\item 
int \hyperlink{btl__udapl_8h_a302f37c7fbc8c991a3f05cee6c8c8f40}{mca\+\_\+btl\+\_\+udapl\+\_\+get} (struct \hyperlink{structmca__btl__base__module__t}{mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$btl, struct \hyperlink{structmca__btl__base__endpoint__t}{mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t} $\ast$btl\+\_\+peer, struct \hyperlink{structmca__btl__base__descriptor__t}{mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t} $\ast$decriptor)
\begin{DoxyCompactList}\small\item\em Initiate an asynchronous get. \end{DoxyCompactList}\item 
\hyperlink{structmca__btl__base__descriptor__t}{mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t} $\ast$ \hyperlink{btl__udapl_8h_aade78757ef8615ca2f9738d92eb474c6}{mca\+\_\+btl\+\_\+udapl\+\_\+alloc} (struct \hyperlink{structmca__btl__base__module__t}{mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$btl, struct \hyperlink{structmca__btl__base__endpoint__t}{mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t} $\ast$endpoint, uint8\+\_\+t order, size\+\_\+t size, uint32\+\_\+t flags)
\begin{DoxyCompactList}\small\item\em Allocate a descriptor with a segment of the requested size. \end{DoxyCompactList}\item 
int \hyperlink{btl__udapl_8h_a838cb517b91627e9c3e14bde3b1f4c52}{mca\+\_\+btl\+\_\+udapl\+\_\+free} (struct \hyperlink{structmca__btl__base__module__t}{mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$btl, \hyperlink{structmca__btl__base__descriptor__t}{mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t} $\ast$des)
\begin{DoxyCompactList}\small\item\em Return a segment allocated by this B\+T\+L. \end{DoxyCompactList}\item 
\hyperlink{structmca__btl__base__descriptor__t}{mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t} $\ast$ \hyperlink{btl__udapl_8h_a48038f399483d7ad61d701c4ba4c3187}{mca\+\_\+btl\+\_\+udapl\+\_\+prepare\+\_\+src} (struct \hyperlink{structmca__btl__base__module__t}{mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$btl, struct \hyperlink{structmca__btl__base__endpoint__t}{mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t} $\ast$peer, struct \hyperlink{structmca__mpool__base__registration__t}{mca\+\_\+mpool\+\_\+base\+\_\+registration\+\_\+t} $\ast$, struct \hyperlink{structopal__convertor__t}{opal\+\_\+convertor\+\_\+t} $\ast$convertor, uint8\+\_\+t order, size\+\_\+t reserve, size\+\_\+t $\ast$size, uint32\+\_\+t flags)
\begin{DoxyCompactList}\small\item\em Prepare a descriptor for send/rdma using the supplied convertor. \end{DoxyCompactList}\item 
\hyperlink{structmca__btl__base__descriptor__t}{mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t} $\ast$ \hyperlink{btl__udapl_8h_aabed66a3a3b6cbfde23e65f5ddb359f8}{mca\+\_\+btl\+\_\+udapl\+\_\+prepare\+\_\+dst} (struct \hyperlink{structmca__btl__base__module__t}{mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$btl, struct \hyperlink{structmca__btl__base__endpoint__t}{mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t} $\ast$peer, struct \hyperlink{structmca__mpool__base__registration__t}{mca\+\_\+mpool\+\_\+base\+\_\+registration\+\_\+t} $\ast$, struct \hyperlink{structopal__convertor__t}{opal\+\_\+convertor\+\_\+t} $\ast$convertor, uint8\+\_\+t order, size\+\_\+t reserve, size\+\_\+t $\ast$size, uint32\+\_\+t flags)
\begin{DoxyCompactList}\small\item\em Prepare a descriptor for send/rdma using the supplied convertor. \end{DoxyCompactList}\item 
int \hyperlink{btl__udapl_8h_a89c746f58fa04b28c802a26f54b7c59e}{mca\+\_\+btl\+\_\+udapl\+\_\+ft\+\_\+event} (int state)
\begin{DoxyCompactList}\small\item\em Fault Tolerance Event Notification \hyperlink{structFunction}{Function}. \end{DoxyCompactList}\end{DoxyCompactItemize}
\subsection*{Variables}
\begin{DoxyCompactItemize}
\item 
\hypertarget{btl__udapl_8h_a5635830330c4d3918efead8f732cebf5}{O\+M\+P\+I\+\_\+\+M\+O\+D\+U\+L\+E\+\_\+\+D\+E\+C\+L\+S\+P\+E\+C \\*
\hyperlink{structmca__btl__udapl__component__t}{mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+t} {\bfseries mca\+\_\+btl\+\_\+udapl\+\_\+component}}\label{btl__udapl_8h_a5635830330c4d3918efead8f732cebf5}

\item 
\hypertarget{btl__udapl_8h_ab68e90be1e64f7c60c979a1c897bb8be}{\hyperlink{structmca__btl__udapl__module__t}{mca\+\_\+btl\+\_\+udapl\+\_\+module\+\_\+t} {\bfseries mca\+\_\+btl\+\_\+udapl\+\_\+module}}\label{btl__udapl_8h_ab68e90be1e64f7c60c979a1c897bb8be}

\end{DoxyCompactItemize}


\subsection{Macro Definition Documentation}
\hypertarget{btl__udapl_8h_ad2d1f4735fedaa7cb4c66cfc95349749}{\index{btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}!B\+T\+L\+\_\+\+U\+D\+A\+P\+L\+\_\+\+V\+E\+R\+B\+O\+S\+E\+\_\+\+H\+E\+L\+P@{B\+T\+L\+\_\+\+U\+D\+A\+P\+L\+\_\+\+V\+E\+R\+B\+O\+S\+E\+\_\+\+H\+E\+L\+P}}
\index{B\+T\+L\+\_\+\+U\+D\+A\+P\+L\+\_\+\+V\+E\+R\+B\+O\+S\+E\+\_\+\+H\+E\+L\+P@{B\+T\+L\+\_\+\+U\+D\+A\+P\+L\+\_\+\+V\+E\+R\+B\+O\+S\+E\+\_\+\+H\+E\+L\+P}!btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}}
\subsubsection[{B\+T\+L\+\_\+\+U\+D\+A\+P\+L\+\_\+\+V\+E\+R\+B\+O\+S\+E\+\_\+\+H\+E\+L\+P}]{\setlength{\rightskip}{0pt plus 5cm}\#define B\+T\+L\+\_\+\+U\+D\+A\+P\+L\+\_\+\+V\+E\+R\+B\+O\+S\+E\+\_\+\+H\+E\+L\+P(
\begin{DoxyParamCaption}
\item[{}]{verbose\+\_\+level, }
\item[{}]{args}
\end{DoxyParamCaption}
)}}\label{btl__udapl_8h_ad2d1f4735fedaa7cb4c66cfc95349749}
{\bfseries Value\+:}
\begin{DoxyCode}
\textcolor{keywordflow}{do} \{                                                                \(\backslash\)
    if (verbose\_level <= mca\_btl\_udapl\_component.\hyperlink{structmca__btl__udapl__component__t_aa348c45ae5fe4f0f83654fd1649bde10}{udapl\_verbosity}) \{ 
      \hyperlink{orte_2util_2show__help_8h_a26cc59040695654429e9651119eb46d7}{\(\backslash\)}
\hyperlink{orte_2util_2show__help_8h_a26cc59040695654429e9651119eb46d7}{        orte\_show\_help} args;                                        \(\backslash\)
    \}                                                               \(\backslash\)
\} \textcolor{keywordflow}{while}(0);
\end{DoxyCode}
\hypertarget{btl__udapl_8h_a294ce504f6df0948717cb7c066b08414}{\index{btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}!B\+T\+L\+\_\+\+U\+D\+A\+P\+L\+\_\+\+V\+E\+R\+B\+O\+S\+E\+\_\+\+O\+U\+T\+P\+U\+T@{B\+T\+L\+\_\+\+U\+D\+A\+P\+L\+\_\+\+V\+E\+R\+B\+O\+S\+E\+\_\+\+O\+U\+T\+P\+U\+T}}
\index{B\+T\+L\+\_\+\+U\+D\+A\+P\+L\+\_\+\+V\+E\+R\+B\+O\+S\+E\+\_\+\+O\+U\+T\+P\+U\+T@{B\+T\+L\+\_\+\+U\+D\+A\+P\+L\+\_\+\+V\+E\+R\+B\+O\+S\+E\+\_\+\+O\+U\+T\+P\+U\+T}!btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}}
\subsubsection[{B\+T\+L\+\_\+\+U\+D\+A\+P\+L\+\_\+\+V\+E\+R\+B\+O\+S\+E\+\_\+\+O\+U\+T\+P\+U\+T}]{\setlength{\rightskip}{0pt plus 5cm}\#define B\+T\+L\+\_\+\+U\+D\+A\+P\+L\+\_\+\+V\+E\+R\+B\+O\+S\+E\+\_\+\+O\+U\+T\+P\+U\+T(
\begin{DoxyParamCaption}
\item[{}]{verbose\+\_\+level, }
\item[{}]{args}
\end{DoxyParamCaption}
)}}\label{btl__udapl_8h_a294ce504f6df0948717cb7c066b08414}
{\bfseries Value\+:}
\begin{DoxyCode}
\textcolor{keywordflow}{do} \{                                                                \(\backslash\)
    if (verbose\_level <= mca\_btl\_udapl\_component.\hyperlink{structmca__btl__udapl__component__t_aa348c45ae5fe4f0f83654fd1649bde10}{udapl\_verbosity}) \{ \(\backslash\)
        BTL\_OUTPUT(args);                                           \(\backslash\)
    \}                                                               \(\backslash\)
\} \textcolor{keywordflow}{while}(0);
\end{DoxyCode}
\hypertarget{btl__udapl_8h_a056f4c80c859afd0c5ff86a4ff83d0cc}{\index{btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}!V\+E\+R\+B\+O\+S\+E\+\_\+\+C\+R\+I\+T\+I\+C\+A\+L@{V\+E\+R\+B\+O\+S\+E\+\_\+\+C\+R\+I\+T\+I\+C\+A\+L}}
\index{V\+E\+R\+B\+O\+S\+E\+\_\+\+C\+R\+I\+T\+I\+C\+A\+L@{V\+E\+R\+B\+O\+S\+E\+\_\+\+C\+R\+I\+T\+I\+C\+A\+L}!btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}}
\subsubsection[{V\+E\+R\+B\+O\+S\+E\+\_\+\+C\+R\+I\+T\+I\+C\+A\+L}]{\setlength{\rightskip}{0pt plus 5cm}\#define V\+E\+R\+B\+O\+S\+E\+\_\+\+C\+R\+I\+T\+I\+C\+A\+L~0}}\label{btl__udapl_8h_a056f4c80c859afd0c5ff86a4ff83d0cc}


Report Out from u\+D\+A\+P\+L B\+T\+L. 


\begin{DoxyItemize}
\item B\+T\+L\+\_\+\+E\+R\+R\+O\+R() \+: Use to report out errors from u\+D\+A\+P\+L B\+T\+L. These are critical errors which will most likely cause the program to fail so this message should always be reported to the user. Defined in \hyperlink{btl__base__error_8h_source}{btl/base/btl\+\_\+base\+\_\+error.\+h}. Example\+: dat\+\_\+strerror(rc, (const char$\ast$$\ast$)\&major, (const char$\ast$$\ast$)\&minor); B\+T\+L\+\_\+\+E\+R\+R\+O\+R((\char`\"{}\+E\+R\+R\+O\+R\+: \%s \%s \%s\textbackslash{}n\char`\"{}, \char`\"{}dat\+\_\+cr\+\_\+accept\char`\"{}, major, minor));
\item B\+T\+L\+\_\+\+U\+D\+A\+P\+L\+\_\+\+V\+E\+R\+B\+O\+S\+E\+\_\+\+O\+U\+T\+P\+U\+T() \+: Use to output different levels of verbosity to the user. See Note below. Example\+: B\+T\+L\+\_\+\+U\+D\+A\+P\+L\+\_\+\+V\+E\+R\+B\+O\+S\+E\+\_\+\+O\+U\+T\+P\+U\+T(V\+E\+R\+B\+O\+S\+E\+\_\+\+D\+I\+A\+G\+N\+O\+S\+E, (\char`\"{}\+W\+A\+R\+N\+I\+N\+G\+: don't \%s\char`\"{}, \char`\"{}jump\char`\"{}));
\item B\+T\+L\+\_\+\+U\+D\+A\+P\+L\+\_\+\+V\+E\+R\+B\+O\+S\+E\+\_\+\+H\+E\+L\+P() \+: Use output information as defined in u\+D\+A\+P\+L B\+T\+L help file (help-\/mpi-\/btl-\/udapl.\+txt). See Note below. Example\+: B\+T\+L\+\_\+\+U\+D\+A\+P\+L\+\_\+\+V\+E\+R\+B\+O\+S\+E\+\_\+\+H\+E\+L\+P(V\+E\+R\+B\+O\+S\+E\+\_\+\+S\+H\+O\+W\+\_\+\+H\+E\+L\+P, (\char`\"{}help-\/mpi-\/btl-\/udapl.\+txt\char`\"{}, \char`\"{}invalid num rdma segments\char`\"{}, true, 22));
\end{DoxyItemize}

Note \+: -\/ Verbose levels are defined below. These levels are controlled by the mca parameter \char`\"{}btl\+\_\+udapl\+\_\+verbose\char`\"{}. The verbose level is set to 10 by default so that critical error and useful help information will appear. Which ever value this param is set to, those messages as well as any lower level verbose messages will be reported.
\begin{DoxyItemize}
\item Setting \char`\"{}btl\+\_\+udapl\+\_\+verbose\char`\"{} to \char`\"{}-\/1\char`\"{} will turn off all messages reported by the use of B\+T\+L\+\_\+\+U\+D\+A\+P\+L\+\_\+\+V\+E\+R\+B\+O\+S\+E\+\_\+$\ast$().
\item These macros should not be used in a critical path as they are always included in the compiled code.
\item These macros rely on the use of paranthesis around the \char`\"{}args\char`\"{} value.
\end{DoxyItemize}

Values used with B\+T\+L\+\_\+\+U\+D\+A\+P\+L\+\_\+\+V\+E\+R\+B\+O\+S\+E\+\_\+$\ast$()\+:


\begin{DoxyItemize}
\item 0\+: critical user information; should always be reported; on by default
\item 10\+: useful help messages that would be reported from \char`\"{}help-\/mpi-\/btl-\/udapl.\+txt\char`\"{}; accessed from B\+T\+L\+\_\+\+U\+D\+A\+P\+L\+\_\+\+V\+E\+R\+B\+O\+S\+E\+\_\+\+H\+E\+L\+P(); on by default
\item 20\+: general execution diagnostic information; may be useful to user or btl developer
\item 30\+: basic debugging/diagnostic information
\item 90\+: useful only to developers
\item 100\+: other components do not appear to go beyond 100 for verbose levels so noting here as the max for future reference 
\end{DoxyItemize}

Referenced by mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+progress().



\subsection{Function Documentation}
\hypertarget{btl__udapl_8h_a083ea2359658fbe34dd43ea05eacc9c0}{\index{btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}!mca\+\_\+btl\+\_\+udapl\+\_\+add\+\_\+procs@{mca\+\_\+btl\+\_\+udapl\+\_\+add\+\_\+procs}}
\index{mca\+\_\+btl\+\_\+udapl\+\_\+add\+\_\+procs@{mca\+\_\+btl\+\_\+udapl\+\_\+add\+\_\+procs}!btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}}
\subsubsection[{mca\+\_\+btl\+\_\+udapl\+\_\+add\+\_\+procs}]{\setlength{\rightskip}{0pt plus 5cm}int mca\+\_\+btl\+\_\+udapl\+\_\+add\+\_\+procs (
\begin{DoxyParamCaption}
\item[{struct {\bf mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$}]{btl, }
\item[{size\+\_\+t}]{nprocs, }
\item[{struct {\bf ompi\+\_\+proc\+\_\+t} $\ast$$\ast$}]{procs, }
\item[{struct {\bf mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t} $\ast$$\ast$}]{peers, }
\item[{{\bf opal\+\_\+bitmap\+\_\+t} $\ast$}]{reachable}
\end{DoxyParamCaption}
)}}\label{btl__udapl_8h_a083ea2359658fbe34dd43ea05eacc9c0}


P\+M\+L-\/$>$B\+T\+L notification of change in the process list. 


\begin{DoxyParams}{Parameters}
{\em btl} & (I\+N) \\
\hline
{\em nprocs} & (I\+N) Number of processes \\
\hline
{\em procs} & (I\+N) Set of processes \\
\hline
{\em peers} & (O\+U\+T) Set of (optional) peer addressing info. \\
\hline
{\em peers} & (I\+N/\+O\+U\+T) Set of processes that are reachable via this B\+T\+L. \\
\hline
\end{DoxyParams}
\begin{DoxyReturn}{Returns}
O\+M\+P\+I\+\_\+\+S\+U\+C\+C\+E\+S\+S or error status on failure. 
\end{DoxyReturn}


References mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t\+::endpoint\+\_\+btl, O\+B\+J\+\_\+\+R\+E\+L\+E\+A\+S\+E, ompi\+\_\+proc\+\_\+local(), opal\+\_\+bitmap\+\_\+set\+\_\+bit(), O\+P\+A\+L\+\_\+\+T\+H\+R\+E\+A\+D\+\_\+\+L\+O\+C\+K, O\+P\+A\+L\+\_\+\+T\+H\+R\+E\+A\+D\+\_\+\+U\+N\+L\+O\+C\+K, and mca\+\_\+btl\+\_\+udapl\+\_\+proc\+\_\+t\+::proc\+\_\+lock.

\hypertarget{btl__udapl_8h_aade78757ef8615ca2f9738d92eb474c6}{\index{btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}!mca\+\_\+btl\+\_\+udapl\+\_\+alloc@{mca\+\_\+btl\+\_\+udapl\+\_\+alloc}}
\index{mca\+\_\+btl\+\_\+udapl\+\_\+alloc@{mca\+\_\+btl\+\_\+udapl\+\_\+alloc}!btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}}
\subsubsection[{mca\+\_\+btl\+\_\+udapl\+\_\+alloc}]{\setlength{\rightskip}{0pt plus 5cm}{\bf mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t}$\ast$ mca\+\_\+btl\+\_\+udapl\+\_\+alloc (
\begin{DoxyParamCaption}
\item[{struct {\bf mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$}]{btl, }
\item[{struct {\bf mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t} $\ast$}]{endpoint, }
\item[{uint8\+\_\+t}]{order, }
\item[{size\+\_\+t}]{size, }
\item[{uint32\+\_\+t}]{flags}
\end{DoxyParamCaption}
)}}\label{btl__udapl_8h_aade78757ef8615ca2f9738d92eb474c6}


Allocate a descriptor with a segment of the requested size. 

Note that the B\+T\+L layer may choose to return a smaller size if it cannot support the request.


\begin{DoxyParams}{Parameters}
{\em btl} & (I\+N) B\+T\+L module \\
\hline
{\em size} & (I\+N) \hyperlink{classRequest}{Request} segment size.\\
\hline
\end{DoxyParams}
Allocate a descriptor with a segment of the requested size.


\begin{DoxyParams}{Parameters}
{\em btl} & (I\+N) B\+T\+L module \\
\hline
{\em size} & (I\+N) \hyperlink{classRequest}{Request} segment size. \\
\hline
\end{DoxyParams}


References mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t\+::btl\+\_\+eager\+\_\+limit, mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t\+::des\+\_\+dst, mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t\+::des\+\_\+dst\+\_\+cnt, mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t\+::des\+\_\+flags, mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t\+::des\+\_\+src, mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t\+::des\+\_\+src\+\_\+cnt, mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t\+::order, mca\+\_\+btl\+\_\+base\+\_\+segment\+\_\+t\+::seg\+\_\+addr, and mca\+\_\+btl\+\_\+base\+\_\+segment\+\_\+t\+::seg\+\_\+len.

\hypertarget{btl__udapl_8h_ab726542c484f7f794ce99f64e4fdd7db}{\index{btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}!mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+init@{mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+init}}
\index{mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+init@{mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+init}!btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}}
\subsubsection[{mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+init}]{\setlength{\rightskip}{0pt plus 5cm}{\bf mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t}$\ast$$\ast$ mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+init (
\begin{DoxyParamCaption}
\item[{int $\ast$}]{num\+\_\+btl\+\_\+modules, }
\item[{bool}]{allow\+\_\+multi\+\_\+user\+\_\+threads, }
\item[{bool}]{have\+\_\+hidden\+\_\+threads}
\end{DoxyParamCaption}
)}}\label{btl__udapl_8h_ab726542c484f7f794ce99f64e4fdd7db}


u\+D\+A\+P\+L component initialization. 


\begin{DoxyParams}{Parameters}
{\em num\+\_\+btl\+\_\+modules} & (O\+U\+T) Number of B\+T\+Ls returned in B\+T\+L array. \\
\hline
{\em allow\+\_\+multi\+\_\+user\+\_\+threads} & (O\+U\+T) Flag indicating wether B\+T\+L supports user threads (T\+R\+U\+E) \\
\hline
{\em have\+\_\+hidden\+\_\+threads} & (O\+U\+T) Flag indicating wether B\+T\+L uses threads (T\+R\+U\+E) \\
\hline
\end{DoxyParams}


References mca\+\_\+btl\+\_\+udapl\+\_\+init(), ompi\+\_\+mpi\+\_\+thread\+\_\+multiple, opal\+\_\+argv\+\_\+copy(), opal\+\_\+argv\+\_\+split(), mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+t\+::udapl\+\_\+btls, mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+t\+::udapl\+\_\+max\+\_\+btls, and mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+t\+::udapl\+\_\+num\+\_\+btls.

\hypertarget{btl__udapl_8h_a2ffd5e9c4c92984bc10efe74500546f6}{\index{btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}!mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+open@{mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+open}}
\index{mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+open@{mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+open}!btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}}
\subsubsection[{mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+open}]{\setlength{\rightskip}{0pt plus 5cm}int mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+open (
\begin{DoxyParamCaption}
\item[{void}]{}
\end{DoxyParamCaption}
)}}\label{btl__udapl_8h_a2ffd5e9c4c92984bc10efe74500546f6}


Register u\+D\+A\+P\+L component parameters with the M\+C\+A framework. 

Register u\+D\+A\+P\+L component parameters with the M\+C\+A framework. 

References mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t\+::btl\+\_\+eager\+\_\+limit, mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t\+::btl\+\_\+max\+\_\+send\+\_\+size, O\+B\+J\+\_\+\+C\+O\+N\+S\+T\+R\+U\+C\+T, mca\+\_\+btl\+\_\+udapl\+\_\+module\+\_\+t\+::super, mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+t\+::udapl\+\_\+btls, mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+t\+::udapl\+\_\+lock, mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+t\+::udapl\+\_\+num\+\_\+btls, and mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+t\+::udapl\+\_\+procs.

\hypertarget{btl__udapl_8h_a2a9bdcf8060523f8610ae1828877f781}{\index{btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}!mca\+\_\+btl\+\_\+udapl\+\_\+del\+\_\+procs@{mca\+\_\+btl\+\_\+udapl\+\_\+del\+\_\+procs}}
\index{mca\+\_\+btl\+\_\+udapl\+\_\+del\+\_\+procs@{mca\+\_\+btl\+\_\+udapl\+\_\+del\+\_\+procs}!btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}}
\subsubsection[{mca\+\_\+btl\+\_\+udapl\+\_\+del\+\_\+procs}]{\setlength{\rightskip}{0pt plus 5cm}int mca\+\_\+btl\+\_\+udapl\+\_\+del\+\_\+procs (
\begin{DoxyParamCaption}
\item[{struct {\bf mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$}]{btl, }
\item[{size\+\_\+t}]{nprocs, }
\item[{struct {\bf ompi\+\_\+proc\+\_\+t} $\ast$$\ast$}]{procs, }
\item[{struct {\bf mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t} $\ast$$\ast$}]{peers}
\end{DoxyParamCaption}
)}}\label{btl__udapl_8h_a2a9bdcf8060523f8610ae1828877f781}


P\+M\+L-\/$>$B\+T\+L notification of change in the process list. 


\begin{DoxyParams}{Parameters}
{\em btl} & (I\+N) B\+T\+L instance \\
\hline
{\em nproc} & (I\+N) Number of processes. \\
\hline
{\em procs} & (I\+N) Set of processes. \\
\hline
{\em peers} & (I\+N) Set of peer data structures. \\
\hline
\end{DoxyParams}
\begin{DoxyReturn}{Returns}
\hyperlink{classStatus}{Status} indicating if cleanup was successful 
\end{DoxyReturn}
\hypertarget{btl__udapl_8h_a786694cc6d0ee3cfc9150c5f8ec2df51}{\index{btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}!mca\+\_\+btl\+\_\+udapl\+\_\+finalize@{mca\+\_\+btl\+\_\+udapl\+\_\+finalize}}
\index{mca\+\_\+btl\+\_\+udapl\+\_\+finalize@{mca\+\_\+btl\+\_\+udapl\+\_\+finalize}!btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}}
\subsubsection[{mca\+\_\+btl\+\_\+udapl\+\_\+finalize}]{\setlength{\rightskip}{0pt plus 5cm}int mca\+\_\+btl\+\_\+udapl\+\_\+finalize (
\begin{DoxyParamCaption}
\item[{struct {\bf mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$}]{btl}
\end{DoxyParamCaption}
)}}\label{btl__udapl_8h_a786694cc6d0ee3cfc9150c5f8ec2df51}


Cleanup any resources held by the B\+T\+L. 


\begin{DoxyParams}{Parameters}
{\em btl} & B\+T\+L instance. \\
\hline
\end{DoxyParams}
\begin{DoxyReturn}{Returns}
O\+M\+P\+I\+\_\+\+S\+U\+C\+C\+E\+S\+S or error status on failure. 
\end{DoxyReturn}


References mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t\+::btl\+\_\+mpool, O\+B\+J\+\_\+\+D\+E\+S\+T\+R\+U\+C\+T, opal\+\_\+pointer\+\_\+array\+\_\+get\+\_\+item(), and mca\+\_\+btl\+\_\+udapl\+\_\+module\+\_\+t\+::super.

\hypertarget{btl__udapl_8h_a838cb517b91627e9c3e14bde3b1f4c52}{\index{btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}!mca\+\_\+btl\+\_\+udapl\+\_\+free@{mca\+\_\+btl\+\_\+udapl\+\_\+free}}
\index{mca\+\_\+btl\+\_\+udapl\+\_\+free@{mca\+\_\+btl\+\_\+udapl\+\_\+free}!btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}}
\subsubsection[{mca\+\_\+btl\+\_\+udapl\+\_\+free}]{\setlength{\rightskip}{0pt plus 5cm}int mca\+\_\+btl\+\_\+udapl\+\_\+free (
\begin{DoxyParamCaption}
\item[{struct {\bf mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$}]{btl, }
\item[{{\bf mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t} $\ast$}]{des}
\end{DoxyParamCaption}
)}}\label{btl__udapl_8h_a838cb517b91627e9c3e14bde3b1f4c52}


Return a segment allocated by this B\+T\+L. 


\begin{DoxyParams}{Parameters}
{\em btl} & (I\+N) B\+T\+L module \\
\hline
{\em descriptor} & (I\+N) Allocated descriptor.\\
\hline
\end{DoxyParams}
Return a segment allocated by this B\+T\+L. 

References mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t\+::btl\+\_\+mpool, and mca\+\_\+mpool\+\_\+base\+\_\+module\+\_\+t\+::mpool\+\_\+deregister.



Referenced by mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+progress().

\hypertarget{btl__udapl_8h_a89c746f58fa04b28c802a26f54b7c59e}{\index{btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}!mca\+\_\+btl\+\_\+udapl\+\_\+ft\+\_\+event@{mca\+\_\+btl\+\_\+udapl\+\_\+ft\+\_\+event}}
\index{mca\+\_\+btl\+\_\+udapl\+\_\+ft\+\_\+event@{mca\+\_\+btl\+\_\+udapl\+\_\+ft\+\_\+event}!btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}}
\subsubsection[{mca\+\_\+btl\+\_\+udapl\+\_\+ft\+\_\+event}]{\setlength{\rightskip}{0pt plus 5cm}int mca\+\_\+btl\+\_\+udapl\+\_\+ft\+\_\+event (
\begin{DoxyParamCaption}
\item[{int}]{state}
\end{DoxyParamCaption}
)}}\label{btl__udapl_8h_a89c746f58fa04b28c802a26f54b7c59e}


Fault Tolerance Event Notification \hyperlink{structFunction}{Function}. 


\begin{DoxyParams}{Parameters}
{\em state} & Checkpoint Stae \\
\hline
\end{DoxyParams}
\begin{DoxyReturn}{Returns}
O\+M\+P\+I\+\_\+\+S\+U\+C\+C\+E\+S\+S or failure status 
\end{DoxyReturn}
\hypertarget{btl__udapl_8h_a302f37c7fbc8c991a3f05cee6c8c8f40}{\index{btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}!mca\+\_\+btl\+\_\+udapl\+\_\+get@{mca\+\_\+btl\+\_\+udapl\+\_\+get}}
\index{mca\+\_\+btl\+\_\+udapl\+\_\+get@{mca\+\_\+btl\+\_\+udapl\+\_\+get}!btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}}
\subsubsection[{mca\+\_\+btl\+\_\+udapl\+\_\+get}]{\setlength{\rightskip}{0pt plus 5cm}int mca\+\_\+btl\+\_\+udapl\+\_\+get (
\begin{DoxyParamCaption}
\item[{{\bf mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$}]{btl, }
\item[{{\bf mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t} $\ast$}]{endpoint, }
\item[{{\bf mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t} $\ast$}]{des}
\end{DoxyParamCaption}
)}}\label{btl__udapl_8h_a302f37c7fbc8c991a3f05cee6c8c8f40}


Initiate an asynchronous get. 


\begin{DoxyParams}{Parameters}
{\em btl} & (I\+N) B\+T\+L module \\
\hline
{\em endpoint} & (I\+N) B\+T\+L addressing information \\
\hline
{\em descriptor} & (I\+N) Description of the data to be transferred \\
\hline
\end{DoxyParams}
\hypertarget{btl__udapl_8h_a0cbdab4a33fcc4466a7bbaff1e079ff7}{\index{btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}!mca\+\_\+btl\+\_\+udapl\+\_\+init@{mca\+\_\+btl\+\_\+udapl\+\_\+init}}
\index{mca\+\_\+btl\+\_\+udapl\+\_\+init@{mca\+\_\+btl\+\_\+udapl\+\_\+init}!btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}}
\subsubsection[{mca\+\_\+btl\+\_\+udapl\+\_\+init}]{\setlength{\rightskip}{0pt plus 5cm}int mca\+\_\+btl\+\_\+udapl\+\_\+init (
\begin{DoxyParamCaption}
\item[{D\+A\+T\+\_\+\+N\+A\+M\+E\+\_\+\+P\+T\+R}]{ia\+\_\+name, }
\item[{{\bf mca\+\_\+btl\+\_\+udapl\+\_\+module\+\_\+t} $\ast$}]{btl}
\end{DoxyParamCaption}
)}}\label{btl__udapl_8h_a0cbdab4a33fcc4466a7bbaff1e079ff7}


Initialize resources for a new B\+T\+L/u\+D\+A\+P\+L I\+A. 


\begin{DoxyParams}{Parameters}
{\em ia\+\_\+name} & Name of u\+D\+A\+P\+L interface adapter \\
\hline
{\em btl} & B\+T\+L instance. \\
\hline
\end{DoxyParams}
\begin{DoxyReturn}{Returns}
O\+M\+P\+I\+\_\+\+S\+U\+C\+C\+E\+S\+S or error status on failure.
\end{DoxyReturn}
Initialize resources for a new B\+T\+L/u\+D\+A\+P\+L I\+A. 

References mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t\+::btl\+\_\+mpool, O\+B\+J\+\_\+\+C\+L\+A\+S\+S, O\+B\+J\+\_\+\+C\+O\+N\+S\+T\+R\+U\+C\+T, opal\+\_\+pointer\+\_\+array\+\_\+init(), mca\+\_\+btl\+\_\+udapl\+\_\+module\+\_\+t\+::super, mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+t\+::udapl\+\_\+buffer\+\_\+alignment, mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+t\+::udapl\+\_\+free\+\_\+list\+\_\+inc, mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+t\+::udapl\+\_\+free\+\_\+list\+\_\+max, mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+t\+::udapl\+\_\+free\+\_\+list\+\_\+num, mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+t\+::udapl\+\_\+max\+\_\+eager\+\_\+rdma\+\_\+peers, and mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+t\+::udapl\+\_\+mpool\+\_\+name.



Referenced by mca\+\_\+btl\+\_\+udapl\+\_\+component\+\_\+init().

\hypertarget{btl__udapl_8h_aabed66a3a3b6cbfde23e65f5ddb359f8}{\index{btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}!mca\+\_\+btl\+\_\+udapl\+\_\+prepare\+\_\+dst@{mca\+\_\+btl\+\_\+udapl\+\_\+prepare\+\_\+dst}}
\index{mca\+\_\+btl\+\_\+udapl\+\_\+prepare\+\_\+dst@{mca\+\_\+btl\+\_\+udapl\+\_\+prepare\+\_\+dst}!btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}}
\subsubsection[{mca\+\_\+btl\+\_\+udapl\+\_\+prepare\+\_\+dst}]{\setlength{\rightskip}{0pt plus 5cm}{\bf mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t}$\ast$ mca\+\_\+btl\+\_\+udapl\+\_\+prepare\+\_\+dst (
\begin{DoxyParamCaption}
\item[{struct {\bf mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$}]{btl, }
\item[{struct {\bf mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t} $\ast$}]{endpoint, }
\item[{struct {\bf mca\+\_\+mpool\+\_\+base\+\_\+registration\+\_\+t} $\ast$}]{registration, }
\item[{struct {\bf opal\+\_\+convertor\+\_\+t} $\ast$}]{convertor, }
\item[{uint8\+\_\+t}]{order, }
\item[{size\+\_\+t}]{reserve, }
\item[{size\+\_\+t $\ast$}]{size, }
\item[{uint32\+\_\+t}]{flags}
\end{DoxyParamCaption}
)}}\label{btl__udapl_8h_aabed66a3a3b6cbfde23e65f5ddb359f8}


Prepare a descriptor for send/rdma using the supplied convertor. 

If the convertor references data that is contiguous, the descriptor may simply point to the user buffer. Otherwise, this routine is responsible for allocating buffer space and packing if required.


\begin{DoxyParams}{Parameters}
{\em btl} & (I\+N) B\+T\+L module \\
\hline
{\em endpoint} & (I\+N) B\+T\+L peer addressing \\
\hline
{\em convertor} & (I\+N) Data type convertor \\
\hline
{\em reserve} & (I\+N) Additional bytes requested by upper layer to precede user data \\
\hline
{\em size} & (I\+N/\+O\+U\+T) Number of bytes to prepare (I\+N), number of bytes actually prepared (O\+U\+T) \\
\hline
\end{DoxyParams}


References mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t\+::btl\+\_\+mpool, mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t\+::des\+\_\+dst, mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t\+::des\+\_\+dst\+\_\+cnt, mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t\+::des\+\_\+flags, mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t\+::des\+\_\+src, mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t\+::des\+\_\+src\+\_\+cnt, mca\+\_\+mpool\+\_\+base\+\_\+module\+\_\+t\+::mpool\+\_\+register, mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t\+::order, mca\+\_\+btl\+\_\+base\+\_\+segment\+\_\+t\+::seg\+\_\+addr, mca\+\_\+btl\+\_\+base\+\_\+segment\+\_\+t\+::seg\+\_\+key, and mca\+\_\+btl\+\_\+base\+\_\+segment\+\_\+t\+::seg\+\_\+len.

\hypertarget{btl__udapl_8h_a48038f399483d7ad61d701c4ba4c3187}{\index{btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}!mca\+\_\+btl\+\_\+udapl\+\_\+prepare\+\_\+src@{mca\+\_\+btl\+\_\+udapl\+\_\+prepare\+\_\+src}}
\index{mca\+\_\+btl\+\_\+udapl\+\_\+prepare\+\_\+src@{mca\+\_\+btl\+\_\+udapl\+\_\+prepare\+\_\+src}!btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}}
\subsubsection[{mca\+\_\+btl\+\_\+udapl\+\_\+prepare\+\_\+src}]{\setlength{\rightskip}{0pt plus 5cm}{\bf mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t}$\ast$ mca\+\_\+btl\+\_\+udapl\+\_\+prepare\+\_\+src (
\begin{DoxyParamCaption}
\item[{struct {\bf mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$}]{btl, }
\item[{struct {\bf mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t} $\ast$}]{endpoint, }
\item[{struct {\bf mca\+\_\+mpool\+\_\+base\+\_\+registration\+\_\+t} $\ast$}]{registration, }
\item[{struct {\bf opal\+\_\+convertor\+\_\+t} $\ast$}]{convertor, }
\item[{uint8\+\_\+t}]{order, }
\item[{size\+\_\+t}]{reserve, }
\item[{size\+\_\+t $\ast$}]{size, }
\item[{uint32\+\_\+t}]{flags}
\end{DoxyParamCaption}
)}}\label{btl__udapl_8h_a48038f399483d7ad61d701c4ba4c3187}


Prepare a descriptor for send/rdma using the supplied convertor. 

If the convertor references data that is contigous, the descriptor may simply point to the user buffer. Otherwise, this routine is responsible for allocating buffer space and packing if required.


\begin{DoxyParams}{Parameters}
{\em btl} & (I\+N) B\+T\+L module \\
\hline
{\em endpoint} & (I\+N) B\+T\+L peer addressing \\
\hline
{\em convertor} & (I\+N) Data type convertor \\
\hline
{\em reserve} & (I\+N) Additional bytes requested by upper layer to precede user data \\
\hline
{\em size} & (I\+N/\+O\+U\+T) Number of bytes to prepare (I\+N), number of bytes actually prepared (O\+U\+T)\\
\hline
\end{DoxyParams}
Prepare a descriptor for send/rdma using the supplied convertor.


\begin{DoxyParams}{Parameters}
{\em btl} & (I\+N) B\+T\+L module \\
\hline
{\em peer} & (I\+N) B\+T\+L peer addressing \\
\hline
\end{DoxyParams}


References mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t\+::btl\+\_\+max\+\_\+send\+\_\+size, mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t\+::btl\+\_\+mpool, mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t\+::des\+\_\+dst, mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t\+::des\+\_\+dst\+\_\+cnt, mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t\+::des\+\_\+flags, mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t\+::des\+\_\+src, mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t\+::des\+\_\+src\+\_\+cnt, mca\+\_\+mpool\+\_\+base\+\_\+module\+\_\+t\+::mpool\+\_\+register, mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t\+::order, mca\+\_\+btl\+\_\+base\+\_\+segment\+\_\+t\+::seg\+\_\+addr, and mca\+\_\+btl\+\_\+base\+\_\+segment\+\_\+t\+::seg\+\_\+len.

\hypertarget{btl__udapl_8h_ade83967d07957aca9417a42aaed24752}{\index{btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}!mca\+\_\+btl\+\_\+udapl\+\_\+put@{mca\+\_\+btl\+\_\+udapl\+\_\+put}}
\index{mca\+\_\+btl\+\_\+udapl\+\_\+put@{mca\+\_\+btl\+\_\+udapl\+\_\+put}!btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}}
\subsubsection[{mca\+\_\+btl\+\_\+udapl\+\_\+put}]{\setlength{\rightskip}{0pt plus 5cm}int mca\+\_\+btl\+\_\+udapl\+\_\+put (
\begin{DoxyParamCaption}
\item[{{\bf mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$}]{btl, }
\item[{{\bf mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t} $\ast$}]{endpoint, }
\item[{{\bf mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t} $\ast$}]{des}
\end{DoxyParamCaption}
)}}\label{btl__udapl_8h_ade83967d07957aca9417a42aaed24752}


Initiate an asynchronous put. 


\begin{DoxyParams}{Parameters}
{\em btl} & (I\+N) B\+T\+L module \\
\hline
{\em endpoint} & (I\+N) B\+T\+L addressing information \\
\hline
{\em descriptor} & (I\+N) Description of the data to be transferred \\
\hline
\end{DoxyParams}


References mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t\+::des\+\_\+dst, mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t\+::endpoint\+\_\+lock, mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t\+::endpoint\+\_\+lwqe\+\_\+tokens, mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t\+::endpoint\+\_\+max, mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t\+::endpoint\+\_\+max\+\_\+frags, mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t\+::endpoint\+\_\+sr\+\_\+tokens, opal\+\_\+list\+\_\+append, opal\+\_\+progress(), O\+P\+A\+L\+\_\+\+T\+H\+R\+E\+A\+D\+\_\+\+A\+D\+D32, O\+P\+A\+L\+\_\+\+T\+H\+R\+E\+A\+D\+\_\+\+L\+O\+C\+K, O\+P\+A\+L\+\_\+\+T\+H\+R\+E\+A\+D\+\_\+\+U\+N\+L\+O\+C\+K, mca\+\_\+btl\+\_\+base\+\_\+segment\+\_\+t\+::seg\+\_\+addr, mca\+\_\+btl\+\_\+base\+\_\+segment\+\_\+t\+::seg\+\_\+key, and mca\+\_\+btl\+\_\+base\+\_\+segment\+\_\+t\+::seg\+\_\+len.

\hypertarget{btl__udapl_8h_af4fb9b42f540f6fac7eb6f6d11a11a4f}{\index{btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}!mca\+\_\+btl\+\_\+udapl\+\_\+send@{mca\+\_\+btl\+\_\+udapl\+\_\+send}}
\index{mca\+\_\+btl\+\_\+udapl\+\_\+send@{mca\+\_\+btl\+\_\+udapl\+\_\+send}!btl\+\_\+udapl.\+h@{btl\+\_\+udapl.\+h}}
\subsubsection[{mca\+\_\+btl\+\_\+udapl\+\_\+send}]{\setlength{\rightskip}{0pt plus 5cm}int mca\+\_\+btl\+\_\+udapl\+\_\+send (
\begin{DoxyParamCaption}
\item[{struct {\bf mca\+\_\+btl\+\_\+base\+\_\+module\+\_\+t} $\ast$}]{btl, }
\item[{struct {\bf mca\+\_\+btl\+\_\+base\+\_\+endpoint\+\_\+t} $\ast$}]{endpoint, }
\item[{struct {\bf mca\+\_\+btl\+\_\+base\+\_\+descriptor\+\_\+t} $\ast$}]{des, }
\item[{mca\+\_\+btl\+\_\+base\+\_\+tag\+\_\+t}]{tag}
\end{DoxyParamCaption}
)}}\label{btl__udapl_8h_af4fb9b42f540f6fac7eb6f6d11a11a4f}


Initiate an asynchronous send. 


\begin{DoxyParams}{Parameters}
{\em btl} & (I\+N) B\+T\+L module \\
\hline
{\em endpoint} & (I\+N) B\+T\+L addressing information \\
\hline
{\em descriptor} & (I\+N) Description of the data to be transferred \\
\hline
{\em tag} & (I\+N) The tag value used to notify the peer. \\
\hline
\end{DoxyParams}


References mca\+\_\+btl\+\_\+base\+\_\+segment\+\_\+t\+::seg\+\_\+addr, and mca\+\_\+btl\+\_\+base\+\_\+segment\+\_\+t\+::seg\+\_\+len.

