Pun, Kong-Pang BEng, MPhil, PhD, SrMIEEE, MHKIE Professor Tel: +852 3943 8293 Fax: +852 2603 5558 Email: kppun (AT) ee cuhk edu (Region)

Prof. Pun received his B.Eng. and M.Phil. degrees in Electronic Engineering from the Chinese University of Hong Kong (CUHK) in 1995 and 1997 respectively, and his Ph.D. degree in Electrical and Computer Engineering from the Instituto Superior Tecnico, Technical University of Lisbon, Portugal, in 2001. He then joined the Department of Electronic Engineering, CUHK, as a faculty member. He was a visiting scholar at the Columbia Integrated Systems Laboratory, Columbia University, New York, during his leave from CUHK in the summer of 2004.

Prof. Pun served as the Chairman of IEEE Hong Kong Joint-Chapter of Electron Devices and Solid-State Circuits in 2008 and 2009. He was a general co-chair of IEEE International Conference on Electron Devices and Solid-State Circuits 2008, and a member of the international technical committee of the IEEE International Solid State Circuits Conference (ISSCC) from 2008 to 2012. He was a guest editor of IEEE Transactions on Circuits and System II: Express Brief 2009 special issue on "Circuits and Systems Solution for Nanoscale CMOS Design Challenges", and IEEE Journal on Emerging and Selected Topics in Circuits and Systems 2015 special issue on next-generation delta-sigma converters. Prof. Pun is a co-opted member of Consumer Council, and a member of Electrical Safety Advisory Committee of the Hong Kong SAR Government.

Prof. Pun's research focuses on CMOS analog/mixed-signal integrated circuits design, particularly high power-efficiency circuits for data conversion, natural signal interface and extraction, and power processing. He received Exemplary Teaching Awards from the Department of Electronic of Engineering in 2005, 2010, 2013 and 2021.

Courses Taught:

• ELEG3201 Microelectronic Devices and Circuits
• ELEG3207 Introduction to Power Electronics
• ELEG4211 CMOS Digital Integrated Circuits Design
• ELEG5210 CMOS Analog Integrated Circuits
• ELEG5280 Analog-Digital ASIC Design

Selected Recent Publications: 

• H. Wang, D. Basak, Y. Zhang and K.P. Pun, " A 0.59-mW 78.7-dB SNDR 2-MHz Bandwidth Active-RC Delta-Sigma Modulator With Relaxed and Reduced Amplifiers," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 68, no. 3, pp. 1114 - 1122, March 2021.
• E. Shi, X.Tang and K.P. Pun, " A 270 nW Switched-Capacitor Acoustic Feature Extractor for Always-On Voice Activity Detection," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 68, no. 3, pp.1045-1054, March 2021.
• Y. Zhang, P. Kinget and K.P. Pun, " A 0.032-mm² 43.3-fJ/step 100–200-MHz IF 2-MHz Bandwidth Bandpass DSM Based on Passive N-path Filters," IEEE Journal of Solid-State Circuits, vol. 55, no. 9, pp. 2443 - 2455, Sept. 2020.
• D. Basak, S. Kalani, Y. Zhang and K.P. Pun, " An Automatic On-Chip Calibration Technique for Static and Dynamic DAC Error Correction in High-Speed Continuous-Time Delta-Sigma Modulators," IEEE Access, vol.7, no.1, pp. 172097-172109, Dec. 2019.
• Y. Zhang, D. Basak and K.P. Pun, " A Highly Linear Multi-Level SC DAC in a Power-Efficient Gm-C Continuous-TimeDelta-Sigma Modulator," IEEE Transactions on Circuits and Systems I: Regular Papers, vo.66, no.12, pp.4592-4605, Dec. 2019
• E. Shi, D de Godoy, P. Kinget and K.P. Pun, " A 9.6nW, 8-bit, 100S/s Envelope-to-Digital Converter for Respiratory Monitoring," IEEE Transactions on Circuits and Systems II: Express , vol. 67, no. 3, pp. 445-449, Mar. 2019.
• Y. Zhang, X.Y. He and K.P. Pun, " An Extremely Linear Multi-level DAC for Continuous-time Delta-Sigma Modulators," IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 66, no. 3, March 2019.
• Y. Zhang, D. Basak and K.P. Pun, " Power-Efficient Gm-C DSMs with High Immunity to Aliasing, Clock Jitter, and ISI," IEEE Transactions on VLSI Systems, vol. 27, no. 2, pp.337-349, February 2019.
• Z.Y. Fu and K.P. Pun, " A SAR ADC Switching Scheme with MSB Prediction for a Wide Input Range and Reduced Reference Voltage," IEEE Transactions on VLSI Systems, vol. 26, no. 12, Dec. 2018.
• D. Li, D. Basak, Y. Zhang, Z. Fu and K.P. Pun, " Improving power efficiency for active-RC Delta-Sigma modulators using a passive-RC low-pass filter in the feedback," IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 65, no.11, pp.1559-1563, Nov. 2018.
• X. Tang, J. Zeng, K.P. Pun, S. Mai, C. Zhang and Z. Wang, " Low-cost maximum efficiency tracking method for wireless power transfer systems," IEEE Transactions on Power Electronics, vol. 33, no. 6, pp.5317-5329, June 2018.
• D. Basak, D. Li and K.P. Pun, " A Gm-C Delta-Sigma modulator with a merged input-feedback Gm circuit for nonlinearity cancellation and power efficiency enhancement," IEEE Transactions on Circuits and Systems I: Regular Papers, vol.65, no.4, pp.1196-1209, April 2018.
• Z. Fu, X. Tang and K.P. Pun, " Use DAS Algorithm to Break Through the Device Limitations of Switched-capacitor-based DAC in an ADC Consisting of Pipelined SAR and TDC," Elsevier Solid State Electronics, vol. 138, pp.119-125, Dec. 2017.
• D. Li, Y. Zhang, D. Basak and K.P. Pun, " Continuous-time Delta-Sigma modulator with an upfront passive-RC low-pass Network," (2017 ISOCC Best Paper Award) in Proc. International SoC Design Conference, Nov. 2017, Korea.
• C.T. Ko, K.P. Pun and A. Gothenberg, " A 5-ps Vernier sub-ranging time-to-digital converter with DNL calibration," Elsevier Microelectronics Journal, vol. 46, no.12, pp. 1469-1480, Dec. 2015.
• M. Jose, R. Schreier, K.P. Pun and S. Pavan, " Next-generation Delta-Sigma converters: trends and perspectives," IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 5, no.4, pp. 484-499, Dec. 2015.
• X. Tang, W.T. Ng and K.P. Pun, " A resistor-based sub-1V CMOS smart temperature sensor for VLSI thermal management," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 23, no. 9, pp. 1651-1660, Sept. 2015.
• L. Sun, A. Wong, B. Li, W.T. Ng and K.P. Pun, " A charge recycling SAR ADC with a LSB-down switching scheme," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 52, no. 2, pp.356-365, Feb. 2015.
• X. Tang and K.P. Pun, " New Amplifier-less Pipelined ADC with Wide Power Scalability and ERBW," Springer Analog Integrated Circuits and Signal Processing, July 2014.
• B. Li, L. Sun, C.T. Ko, A.K.Y. Wong and K.P. Pun, " A high-linearity capacitance-to-digital converter suppressing charge errors from bottom-plate switches," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 61, no. 7, pp. 1928 - 1941, July 2014.
• L. Sun, C.T. Ko and K.P. Pun, "Optimizing the stage resolution in pipelined SAR ADCs for high-speed high-resolution applications," IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 61, no. 7, July 2014.
• L. Sun, K.P. Pun and W.T. Ng, "Capacitive digital-to-analogue converters with least significant bit down in differential successive approximation register ADCs," IET Journal of Engineering, 2014.
• B. Li and K.P. Pun, "A high image-rejection SC quadrature bandpass DSM for low-IF receivers," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 61, no. 1, pp. 92-105, Jan. 2014.
• L. Sun and K.P. Pun, "Design considerations of calibration DAC in self-calibrated SAR A/D converters," Microelectronics Journal, vol. 45, no. 1, pp.14-22, Jan. 2014.
• B. Li and K.P. Pun, "A continuous-time cascaded delta-sigma modulator with PMW-based automatic RC time constant tuning and correlated double sampling," Microelectronics Journal, vol. 44, no. 5, pp. 431-441, May 2013.
• K.P. Pun, L. Sun and B. Li, "Unit capacitor array based SAR ADC," Microelectronics Reliability, vol. 53, no. 3, pp. 505-508, Mar. 2013.
• M.H. Ho, Y.Q. Ai, T.C.P. Chau, S.C.L. Yuen, C.S. Choy, P.H.W. Leong, K.P. Pun "Architecture and design flow for a highly efficient structured ASIC," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 21, no. 3, pp. 424-433, Mar. 2013.
• X. Tang, C.-T. Ko, and K.P. Pun, "A charge-pump and comparator based power-efficient pipelined ADC technique," Microelectronics Journal, vol. 43, no. 3, pp. 182-188, Mar. 2012.
• Y. Chen and K.P. Pun, "A 0.5-V 90-dB SNDR 102 dB-SFDR audio-band continuous-time delta-sigma modulator," Analog Integrated Circuits and Signal Processing, vol. 71, no. 2, pp. 159-169, Feb. 2012.
• C.-T. Ko, K.P. Pun, and A. Gothenberg, "Vernier parallel delay-line based time-to-digital converter," Analog Integrated Circuits and Signal Processing, vol. 71, no.1, pp. 151-153, Jan. 2012.
• Y.-S. Zhao, S.-K. Tang, C.-T. Ko, and K.P. Pun, "A chopper-stabilized high-pass Delta-Sigma Modulator with reduced chopper charge injection," Microelectronics Journal, vol. 42, no. 5, pp. 733-739, May 2011.
• Y. Chen, K.P. Pun, and P. Kinget, "A 0.5-V 81.2 dB SNDR audio-band continuous-time Delta-Sigma modulator with SCR feedback," Analog Integrated Circuits and Signal Processing, vol. 67, no. 3, pp. 285-292, Mar. 2011.
• X. Tang and K.P. Pun, "A novel switched-current successive approximation ADC," Journal of Circuits, Systems, and Computers, vol. 20, no.1, pp. 15-27, Feb. 2011.
• X.-Y. He, K.P. Pun, S.-K. Tang, C.-S. Choy, and P. Kinget, "A 0.5 V 65.7 dB 1 MHz continuous-time complex delta sigma modulator," Analog Integrated Circuits and Signal Processing, vol. 66, no.2, pp. 255-267, Feb. 2011.
• A. K. Wong, K.-N. Leung, K.P. Pun, and Y.-T. Zhang, "A 0.5-Hz high-pass cutoff dual-loop transimpedance amplifier for wearable NIR sensing device," IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 57, no. 7, pp. 531-535, July 2010.
• P.-K. Chan, C.-S. Choy, K.P. Pun, C.-F. Chan, and K.-N. Leung, "Analysis of the behaviours of phase and amplitude mismatch compensators to achieve 82.5 dB image rejection ratio," International Journal of Electronics, vol. 97, no. 5, pp. 553-568, May 2010.
• K. N. Leung, C. S. Choy, K.P. Pun, L. L. K. Leung, J. Guo, Y. Sum Ng, C. F. Chan, W. Shi, Y. Hong, and M. Ho, "RF Module Design of Passive UHF RFID Tag Implemented in CMOS 90-nm Technology," Journal of Low Power Electronics, vol. 6, no. 1, pp. 141-149, Apr. 2010.
• C.-F. Chan, K.P. Pun, K.-N. Leung, J. Guo, L.-K. Leung, and C.-S. Choy, "A low-power continuously-calibrated clock recovery circuit for UHF RFID EPC class-1 generation-2 transponders," IEEE Journal of Solid-State Circuits, vol. 45, no. 3, pp. 587-599, Mar. 2010.
• W.-C. Cheng, C.-F. Chan, K.P. Pun, and C.-S. Choy, "A low voltage current mode CMOS integrated receiver front-end for GPS system," Analog Integrated Circuits and Signal Processing, vol. 63, no. 1, pp. 23-31, Jan. 2010.
• X.-Y. He, K.P. Pun, and P. Kinget, "A 0.5-V wideband amplifier for a 1-MHz CT complex delta-sigma modulator," IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 56, no. 11, pp. 805-809, Nov. 2009.
• X. Tang and K.P. Pun, "High-performance CMOS current comparator," IET Electronics Letters, vol. 45, no. 20, pp. 1007-1009, Sept. 2009.
• A. K. Wong, K.P. Pun, Y.-T. Zhang, and K. N. Leung, "A low-power CMOS front-end for photoplethysmographic signal acquisition with robust DC photocurrent rejection," IEEE Transactions on Biomedical Circuits and Systems, vol. 2, no. 4, pp. 280-288, Dec. 2008.
• S.-K. Tang, K.P. Pun, C.-S. Choy, C.-F. Chan, and K. N. Leung, "A fully differential band-selective low-noise amplifier for MB-OFDM UWB receivers," IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 55, no. 7, pp. 653-657, July 2008.
• K.P. Pun, S. Chatterjee, and P. R. Kinget, "A 0.5-V 74-dB SNDR 25-kHz continuous-time delta-sigma modulator with a return-to-open DAC," IEEE Journal of Solid-State Circuits, vol. 42, no. 3, pp. 496-507, Mar. 2007.

Research Books: 

• S. Chatterjee, K.P. Pun, N. Stanic, Y. Tsividis and P. Kinget, Analog Circuit Design Techniques at 0.5V, Springer, July 2007.
• K.P. Pun, J.E. Franca and C.A. Leme, Circuit Design for Wireless Communications:Improved Techniques for Image Rejection in Wideband Quadrature Receivers, Boston, USA, Kluwer Academic Publishers, April 2003.

Patents:

• K.P. Pun, S. Chatterjee, and P. R. Kinget, "Low voltage comparator circuits," US Patent No.: US 8,704,553 B2, Date of Patent: Apr. 22, 2014.
• K.P. Pun, S. Chatterjee, and P. R. Kinget, "Low voltage digital to analog converter, comparator and sigma-delta modulator circuits," US Patent No.: US 8,305,247 B2, Date of Patent: Nov. 6, 2012.
• C.S. Choy and K.P. Pun, "Sensor interface devices and amplifiers," US Patent No.: US 7,724,170 B2, Date of Patent: May 25, 2010.

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