Annual Report 2005–06

研究 Research 53 電 子產品的成本、尺寸及功耗的持續下降， 主因是集成電路製造技術的「特徵尺寸」 持續縮小，「特徵尺寸」下降的同時，供電電壓亦 要下降，始可保持集成電路的可靠性。 香港中文大學的潘江鵬教授、紐約哥倫比亞大學 的 Prof. Peter Kinget及Dr. Shouri Chatterjee 成功發明一款創紀錄的超低電壓模擬－數字轉換 器（模數轉換器是一種主要的模擬集成電路）。 該模數轉換器的設計採用「連續時間ΔΣ調制 器」結構，僅需零點五伏特的供電電壓，而之前有 相同功能的模數轉換器最少需要零點九伏特的供 電電壓。 該模數轉換器的超低電壓運作功能並非來自使 用任何特殊零件，而是藉電路和系統層面的創新來達致該效果，並與將來納米級的數字集成電路製 造技術相容。此模數轉換器可用於包括音頻信號處理和無線通訊基帶信號處理的廣闊範疇。長遠來 說，開發出來的超低電壓設計技術將幫助模擬集成電路繼續沿著製造技術的發展而行進。 研究結果於二零零六年二月在集成電路領域最權威的會議「國際固態電路會議」中發表。 The continuous reduction in the cost, size and power consumption of modern electronic products is largely due to a corresponding reduction in minimum feature sizes in integrated circuit (IC) fabrication technologies. This feature size scaling requires a proportional scaling of supply voltages to maintain the reliability of ICs. A record-breaking low supply voltage analog-to-digital converter (ADC), a major type of analog ICs, has been developed by Prof. Pun Kong-pang of CUHK, and Prof. Peter Kinget and Dr. Shouri Chatterjee of Columbia University. This ultra-low-voltage ADC was designed in the ‘continuous- time Δ S modulator’ architecture and needs a supply voltage of 0.5 volt only, while previous ADCs with the same level of performance needed at least 0.9 volt. The ADC’s ultra-low-voltage operation is not enabled by using any special devices, but by circuit-level and system-level innovations. As a result, the ADC is compatible with future nano-scale digital IC fabrication technologies. The ADC can be used in a wide range of applications including audio signal processing and wireless communication baseband signal processing. In the long term, the low voltage techniques developed can help analog circuits continue to follow the technology scaling path. The results were presented at the International Solid-State Circuit Conference in San Francisco in February 2006. 傑 出 研 究 計 劃 Outstanding Research Project 超低電壓模擬－數字轉換器 Ultra Low Voltage Analog-to-digital Converter IC Research