CENG3430 Rapid Prototyping of Digital Systems (Spring 2021)

Course Information

Lecture Time and Place MON 16:30~18:15 (@ LSB LT6) (ZOOM)
Lab Time and Place TUE 16:30~18:15 (@ SHB 102) (ZOOM)
Course Instructor / Consultation Hours Prof. Ming-Chang YANG / requested by email @ SHB 906
Teaching Assistants / TA Hours Chao WANG / WED 16:00~17:00 @ SHB 921 (ZOOM) / cwang@cse.cuhk.edu.hk
Lok Yin CHOW / THU 11:30~12:30 @ SHB 921 (ZOOM) / lychow@cse.cuhk.edu.hk

Announcements

  • 22 Mar. 2020: The final project proposal presentation schedule and the final project proposal feedback schedule are posted.
  • 8 Mar. 2020: The final project specification is posted on Blackboard.
    ◎ Submission deadline of final project proposal: 11:59pm on 21 March 2021 (SUN).
    ◎ Submission deadline of final project demo video and final project report: 11:59pm on 9 May 2021 (SUN).
  • 10 Jan. 2021: In view of the current pandemic situation, all the lecture and lab sessions of CENG3430 will be held ***ONLINE*** this term.
  • 2 Jan. 2021: Course webpage is built up and the teaching schedule is online.

Lecture and Lab

Week No. Lecture Lab
Week 1 Jan. 11 (Mon)
Lecture 00: Course Information
Lecture 01: Introduction to VHDL 		Jan. 12 (Tue)
No Lab
Note: No lab will be held for the first week.
Week 2 Jan. 18 (Mon)
Lecture 01: Introduction to VHDL (Cont'd) 		Jan. 19 (Tue)
Lab 01: Introduction to Vivado & Software Simulation
(Deadline: 16:30 on 26 Jan. 2021)
Week 3 Jan. 25 (Mon)
Lecture 01: Introduction to VHDL (Cont'd)
Lecture 02: Introduction to ZedBoard 		Jan. 26 (Tue)
Lab 02: First Program on ZedBoard
(Deadline: 16:30 on 2 Feb. 2021)
Week 4 Feb. 1 (Mon)
Lecture 03: Architectural Styles of VHDL 		Feb. 2 (Tue)
Lab 03: Four-Bit Adder
(Deadline: 16:30 on 9 Feb. 2021)
Week 5 Feb. 8 (Mon)
Lecture 03: Architectural Styles of VHDL (Cont'd)
Lecture 04: Combinational Circuit and Sequential Circuit
 Feb. 9 (Tue)
Lab 04: Serial-In-Parallel-Out Shift Register
(Deadline: 16:30 on 23 Feb. 2021)
Week 6 Feb. 15 (Mon)
Lunar New Year Vacation (No Class)
 Feb. 16 (Tue)
Lunar New Year Vacation (No Lab)
Week 7 Feb. 22 (Mon)
Lecture 04: Combinational Circuit and Sequential Circuit (Cont'd)
 Feb. 23 (Tue)
Lab 05: Driving the Seven Segment Display
(Deadline: 16:30 on 9 Mar. 2021)
Week 8 Mar. 1 (Mon)
Lecture 04: Combinational Circuit and Sequential Circuit (Cont'd)
Lecture 05: Use of Clock Sources and Peripheral Modules on ZedBoard
Lecture 06: Driving VGA Display with ZedBoard 		Mar. 2 (Tue)
Lab 06: Driving the VGA Display
(Full-Marks Deadline: 16:30 on 9 Mar. 2021)
(25%-Deduction Deadline: 16:30 on 16 Mar. 2021)
Week 9 Mar. 8 (Mon)
Lecture 06: Driving VGA Display with ZedBoard (Cont'd)
Lecture 07: Rapid Prototyping (I) - Integration of ARM and FPGA
 Mar. 9 (Tue)
Lab 07: Integration of ARM and FPGA - A Software Stopwatch
(Deadline: 16:30 on 16 Mar. 2021)
Week 10 Mar. 15 (Mon)
Lecture 07: Rapid Prototyping (I) - Integration of ARM and FPGA (Cont'd)
Lecture 08: Rapid Prototyping (II) - Embedded Operating System
 Mar. 16 (Tue)
Lab 08: Software Stopwatch with Embedded Linux
(Deadline: 16:30 on 23 Mar. 2021)
Week 11 Mar. 22 (Mon)
Final Project Proposal Presentation (Schedule) 		Mar. 23 (Tue)
Final Project Proposal Feedback (Schedule)
Week 12 Mar. 29 (Mon)
Reading Week (No Class)
 Mar. 30 (Tue)
Reading Week (No Lab)
Week 13 Apr. 4 (Mon)
Public Holiday – The day following Ching Ming Festival (No Class)
 Apr. 5 (Tue)
Public Holiday – Easter (No Lab)
Week 14 Apr. 11 (Mon)
◎ 50%-Deduction Make-up Submission (for All Labs): 16:30 on 11 Apr. 2021
Lecture 09: High Level Synthesis
 Apr. 12 (Tue)
Final Project Progress Update (Schedule)
TBA
Week 15 Apr. 19 (Mon)
Lecture 10: VHDL versus Verilog
 Mar. 20 (Tue)
TBA

References