In the past decade, CDSC has been exploring customizable computing, which emphasizes extensive use of customized accelerators on programmable fabrics for much greater performance and energy efficiency. With Intel’s $17B accquistion of Altera in 2015 and Amazon’s introduction of FPGAs in its AWS public cloud in 2017, customizable computing is going from advanced research into mainstream computing.
Although the performance and energy efficiency benefits have been clearly demonstrated, a significant challenges, however, is the efficient design and implementation of various acceleration on FPGAs, which is a barrier to many software programmers. In this talk, I shall talk about our effort on developing an automated compilation flow from high-level programming languages to FPGAs. I start with a quick review of our early work on high-level synthesis. Then, I shall present our recent effort on source-code level transformation and optimization for customizable computing, including support of high-level domain-specific languages (DSL) for deep learning (with Caffe or TensorFlow), imaging processing (with Halide), and big-data processing (with Spark), and suppoort automated compilation to customized microarchitecture templates, such as systolic arrays, stencils, and CPP (composable parallel and pipelined).
